“The content of the training was an excellent walkthrough of the specific features we were interested in and the material was delivered very well by Hardent.  Our group left the training feeling impressed by the tool and excited for the next opportunity to apply what they had learned to a big, complicated design in the smallest FPGA possible.”


Michael Jaspar,
Supervisor, FPGA Development,
Vecima Networks, Inc.

“Having worked in past with independent electronics design consultants, we appreciate Hardent’s quality, team work and timely service. The company has excellent project management skills, open communication, constant follow-up and a flexible approach. We have been working with Hardent for about two years now. Though initially I was not excited about outsourcing R&D, I feel that I can 100% count on Hardent, as they know their business well and they directed us toward good technical decisions. ”


Michel Bitar,
R&D/ I.T Manager,
Prodco International Inc.


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Home > Hardent Training > Hardent Training Course Listing

Hardent Training Course Listing

If you do not find the course you are looking for or would like to inquire about private training, feel free to contact our Training Coordinator at training@hardent.com or (514) 284-5252.

 

Course List

What's HOT right now?

Essential Tcl Scripting for the Vivado Design Suite 2013.X
Vivado Design Suite for ISE Project Navigator Users 2013.X
Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Design Suite Users 2013.X
Essentials of FPGA Design (Vivado) 2013.X
Verification with SystemVerilog 2013.X
Zynq All Programmable SoC System Architecture 2013.X
Embedded Systems Design 2013.X
Embedded Systems Software Design 2013.X


On-Demand Online Training

Essential Tcl Scripting for the Vivado Design Suite 2012.X
Essentials of 7 Series FPGAs v14.X


Vivado Design Suite

Vivado Design Suite for ISE Project Navigator Users 2013.X
Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Design Suite Users 2013.X
Vivado Design Suite Tool Flow 2013.X
Vivado Design Suite Static Timing Analysis & Design Constraints 2013.X
Advanced Tools and Techniques of the Vivado Design Suite 2013.X
ASIC Emulation Using Xilinx v1.00
Essentials of FPGA Design (Vivado) 2013.X
Vivado Design Suite Static Timing Analysis and Xilinx Design Constraints (No Design Methodology) 2013.X


FPGA Design

Debugging Techniques Using the Vivado Logic Anlayzer 2013.X
Vivado Design Suite Hands-on Introductory Workshop 2013.X
Essentials of FPGA Design v14.X
Designing for Performance v14.X
Advanced FPGA Implementation v14.X
FPGA Design Methodology 2013.X
Essential Design with the PlanAhead Analysis and Design Tool v14.X
Advanced Design with the PlanAhead Analysis and Design Tool v 14.X
Designing with the 7 Series Families 2012.X
Designing with the Spartan-6 and Virtex-6 Families v13.X
Designing with the Spartan-6 Family v13.X
Designing with the Virtex-6 Family v13.X
Designing with the Virtex-5 Family v11.X
Debugging Techniques Using Chipscope Pro tools v14.X
ISE Design Tool Flow v13.X
FPGA Power Optimization v13.X
Xilinx Partial Reconfiguration Tools and Techniques v13.X
FPGAs for Managers v1.00
FPGAs for Automotive v1.00
Designing with the Agile Mixed Signal Solution v14.X


Functional Verification

Advanced Universal Verification Methodology (UVM) v1.00
Advanced Open Verification Methodology (OVM) v1.00
OVM to UVM Transition v1.00
SystemVerilog for Verification v1.00
Verilog Fundamentals for SystemVerilog v1.00
Universal Verification methodology (UVM) v1.00
Open Verification Methodology (OVM) Introduction v1.00
SystemVerilog v1.00
Verilog Primer v1.00
Essential Tcl Scripting for the Vivado Design Suite 2013.X
Verification with SystemVerilog 2013.X
Designing with SystemVerilog 2013.X


Programming Languages

Designing with Verilog v13.X
Designing with Verilog 2013.X
Designing with VHDL v13.X
Designing with VHDL 2013.X
Advanced VHDL v13.X
Advanced VHDL 2013.X
SystemVerilog v1.00
Verilog Primer v1.00
Essential Tcl Scripting for the Vivado Design Suite 2013.X


DSP Design

How to Design a Xilinx Digital Signal Processing System in 1 Day v13.X
C-based HLS Coding for Software Designers 2012.X
C-based HLS Coding for Hardware Designers 2012.X
Essential DSP Implementation Techniques for Xilinx FPGAs v13.X
Essential DSP Implementation Techniques 2012.X
DSP Design Using System Generator 2013.X
C-based Design - High-Level Synthesis with Vivado HLS 2013.X
DSP Primer v1.00


Connectivity Design

How to Design a Xilinx Connectivity System in 1 Day v13.X
PCIe Protocol Overview v13.X
Designing a LogiCORE PCI Express System v14.X
Designing with Multi-Gigabit Serial I/O 2013.X
How to Design a High-Speed Memory Interface 2013.X
Signal Integrity and Board Design for Xilinx FPGAs 2012.X
Designing with Ethernet MAC Controllers v13.X


Embedded Systems Design

ARM Cortex-A5 MPCore Software Development 2013.X
ARM Cortex-A7 MPCore Software Development 2013.X
ARM Cortex-A9 MPCore Software Development 2013.X
ARM Cortex-A15 MPCore Software Development 2013.X
ARM Cortex-M0 Software Development 2013.X
ARM Cortex-M0+ Software Development 2013.X
ARM Cortex-M3/M4 Software Development 2013.X
ARM NEON Programming and Optimization 2013.X
ARM Cortex-R4 Software Development 2013.X
ARM Cortex-R5 Software Development 2013.X
Embedded Design with PetaLinux Tools 2013.X
How to Design Xilinx Embedded Systems in 1 Day v13.X
How to Design Xilinx Embedded Systems in 1 Day 2012.2
Essentials of Microprocessors v13.X
Essentials of Microprocessors 2012.X
Embedded Systems Design 2013.X
Essentials of Microprocessors 2013.X
Embedded Systems Design v14.X
Advanced Features and Techniques of Embedded Systems Design 2013.X
Advanced Features and Techniques of Embedded Systems Design v14.X
Advanced Features and Techniques of Embedded Systems Software Design v14.X
Advanced Features and Techniques of Embedded Systems Software Design 2013.X
Introduction to the Zynq All Programmable SoC Architecture v14.X
Introduction to the Zynq All Programmable SoC Architecture 2013.X
Zynq All Programmable SoC System Architecture v14.X
Zynq All Programmable SoC System Architecture 2013.X
C Language Programming with SDK v14.X
C Language Programming with SDK 2013.X
Embedded Systems Software Design 2013.X
Embedded Systems Software Design v14.X
Hardware/Software Co-design for the Xilinx Zynq Virtual Platform v1.00


CPLD Design

Fundamentals of CPLD Design v9.1
Designing for Performance for CPLDs v9.1


Application Specific

Industrial Motor Control Using FPGAs and SoCs v14.X




 

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