“The content of the training was an excellent walkthrough of the specific features we were interested in and the material was delivered very well by Hardent.  Our group left the training feeling impressed by the tool and excited for the next opportunity to apply what they had learned to a big, complicated design in the smallest FPGA possible.”


Michael Jaspar,
Supervisor, FPGA Development,
Vecima Networks, Inc.

“Having worked in past with independent electronics design consultants, we appreciate Hardent’s quality, team work and timely service. The company has excellent project management skills, open communication, constant follow-up and a flexible approach. We have been working with Hardent for about two years now. Though initially I was not excited about outsourcing R&D, I feel that I can 100% count on Hardent, as they know their business well and they directed us toward good technical decisions. ”


Michel Bitar,
R&D/ I.T Manager,
Prodco International Inc.


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Home > Hardent and Xilinx Training > Hardent and Xilinx Training Courses Listing

Hardent and Xilinx Training Courses Listing

The courses offered under the Hardent and Xilinx training courses listing specifically target programmable logic devices. They are prepared by subject matter experts and delivered by experienced designers.

Request a printed copy of the course catalogue.

View the Hardent and Xilinx courses listing online. If you do not find the course you are looking for or would like to inquire about private training, feel free to contact our Training Coordinator at training@hardent.com or (514) 999-3880.

 

Course List

FPGA Design

Essentials of FPGA Design v13.X
Designing for Performance v13.X
Advanced FPGA Implementation v13.X
Essential Design with the PlanAhead Analysis and Design Tool v13.X
Advanced Design with the PlanAhead Analysis and Design Tool v13.X
Designing with the 7 Series Families v13.X
Designing with the Spartan-6 and Virtex-6 Families v13.X
Designing with the Spartan-6 Family v13.X
Designing with the Virtex-6 Family v13.X
Designing with the Virtex-5 Family v11.1
Debugging Techniques Using Chipscope Pro tools v13.X
ISE Design Tool Flow v13.X
FPGA Power Optimization v13.X
Xilinx Partial Reconfiguration Tools and Techniques v13.X


Programming Languages

Designing with Verilog v13.X
Designing with VHDL v13.X
Designing with VHDL - 2 days v13.X
Advanced VHDL v13.X
SystemVerilog Features & Benefits v1.00
Verilog Primer v1.00
SystemVerilog v1.00


Connectivity Design

How to Design a Xilinx Connectivity System in 1 Day v13.X
PCIe Protocol Overview v13.X
Designing a LogiCORE PCI Express System v13.X
Designing with Multi-Gigabit Serial I/O v13.X
How to Design a High-Speed Memory Interface v13.X
Signal Integrity and Board Design for Xilinx FPGAs v13.X
Designing with Ethernet MAC Controllers v13.1


DSP Design

How to Design a Xilinx Digital Signal Processing System in 1 Day v13.X
DSP Primer v1.00
Essential DSP Implementation Techniques for Xilinx FPGAs v12.1
DSP Design Using System Generator v13.X


Embedded Systems Design

How to Design Xilinx Embedded Systems in 1 Day v13.X
Essentials of Microprocessors v13.X
Embedded Systems Development v13.X
Advanced Features and Techniques of Embedded Systems Development v13.X
Embedded Systems Software Development v13.X
Embedded Linux on the MicroBlaze Processor v12.1
C Language Programming with SDK v13.1


CPLD Design

Fundamentals of CPLD Design v9.1
Designing for Performance for CPLDs v9.1




 

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