“Time to market was one of our first considerations in choosing Hardent to design a PCI communication bridge. They grasped the project requirements in a matter of days. Their impressive expertise and responsiveness made the development process very smooth, as if they were working right down the hall.”


Nicolas Gonthier,
Hardware Design Manager,

Verint Systems Canada Inc.

 

 

“Having worked in past with independent electronics design consultants, we appreciate Hardent’s quality, team work and timely service. The company has excellent project management skills, open communication, constant follow-up and a flexible approach. We have been working with Hardent for about two years now. Though initially I was not excited about outsourcing R&D, I feel that I can 100% count on Hardent, as they know their business well and they directed us toward good technical decisions. ”


Michel Bitar,
R&D/ I.T Manager,

Prodco International Inc.
Home > Training > Training Schedule

Training Schedule

The course schedule below is listed in chronological order. Click on the course title to get the full curriculum.

If you do not find the course you are looking for or would like to inquire about private training, feel free to contact our Training Coordinator at training@hardent.com or (514) 999-3880.


Region:

 Date Course Location Status
Sep 14, 2010 Essentials of FPGA Design v12.1 Melbourne, FL
Sep 15-16, 2010 Designing for Performance v12.1 Melbourne, FL
Sep 20, 2010 Essential Design with the PlanAhead Analysis and Design Tool v12.1 Kanata, ON
Sep 21-22, 2010 Advanced Design with the PlanAhead Analysis and Design Tool v12.1 Kanata, ON
Sep 27-28, 2010 Advanced VHDL v12.1 Burlington, MA
Oct 11, 2010 Essential Design with the PlanAhead Analysis and Design Tool v12.1 Burlington, MA
Oct 12-13, 2010 Advanced Design with the PlanAhead Analysis and Design Tool v12.1 Burlington, MA
Oct 14-15, 2010 Advanced FPGA Implementation v12.1 Burlington, MA
Oct 18, 2010 Essential Design with the PlanAhead Analysis and Design Tool v12.1 Rexdale, ON
Oct 19-20, 2010 Advanced Design with the PlanAhead Analysis and Design Tool v12.1 Rexdale, ON
Oct 21-22, 2010 Embedded Systems Development v12.1 Rexdale, ON
Oct 25, 2010 Essentials of FPGA Design v12.1 Kanata, ON
Oct 26-27, 2010 Designing for Performance v12.1 Kanata, ON
Nov 1, 2010 Essential Design with the PlanAhead Analysis and Design Tool v12.1 Duluth, GA
Nov 2-3, 2010 Advanced Design with the PlanAhead Analysis and Design Tool v12.1 Duluth, GA
Nov 8, 2010 ISE Design Tool Flow v12.1 Burlington, MA
Nov 9-10, 2010 Embedded Systems Development v12.1 Burlington, MA
Nov 11-12, 2010 Embedded Linux on the MIcroBlaze Processor [preliminary] v12.1 Burlington, MA
Nov 15-17, 2010 Designing with VHDL v12.1 Durham, NC
Nov 18-19, 2010 Advanced Design with the PlanAhead Analysis and Design Tool v12.1 Durham, NC
Nov 22-23, 2010 Essential DSP Implementation Techniques for Xilinx FPGAs v12.1 Kanata, ON
Nov 24-26, 2010 Signal Integrity and Board Design for Xilinx FPGAs v12.1 Kanata, ON
Nov 25-26, 2010 Advanced Design with the PlanAhead Analysis and Design Tool v12.1 Quebec City, QC
Nov 29-30, 2010 Embedded Systems Development v12.1 Maitland, FL
Nov 30 - Dec 2, 2010 Designing with the Spartan-6 and Virtex-6 Families v12.1 Kanata, ON
Dec 6-8, 2010 Designing with Multi-Gigabit Serial I/O v12.1 Melbourne, FL
Dec 8-10, 2010 Designing with VHDL v12.1 Melbourne, FL
Dec 13-14, 2010 Designing a LogiCORE PCI Express System v12.1 Burlington, MA
Dec 15, 2010 Essentials of FPGA Design v12.1 Burlington, MA
Dec 16-17, 2010 Designing for Performance v12.1 Burlington, MA
Jan 11-13, 2011 Designing with the Spartan-6 and Virtex-6 Families v12.1 Burlington, MA
Jan 17-19, 2011 Designing with VHDL v12.1 Kanata, ON
Jan 20-21, 2011 Advanced Design with the PlanAhead Analysis and Design Tool v12.1 Montreal, QC
Jan 25-27, 2011 Signal Integrity and Board Design for Xilinx FPGAs v12.1 Duluth, GA
Feb 1, 2011 Essential Design with the PlanAhead Analysis and Design Tool v12.1 Melbourne, FL
Feb 1-2, 2011 DSP Design Using System Generator v12.1 Kanata, ON
Feb 2-3, 2011 Advanced Design with the PlanAhead Analysis and Design Tool v12.1 Melbourne, FL
Feb 7-9, 2011 Designing with VHDL v12.1 Burlington, MA
Feb 10-11, 2011 Advanced FPGA Implementation v12.1 Burlington, MA
Feb 22-24, 2011 Designing with Multi-Gigabit Serial I/O v12.1 Kanata, ON
Mar 8-10, 2011 Signal Integrity and Board Design for Xilinx FPGAs v12.1 Burlington, MA
Mar 15-16, 2011 Advanced Design with the PlanAhead Analysis and Design Tool v12.1 Duluth, GA
Mar 22-24, 2011 Designing with the Spartan-6 and Virtex-6 Families v12.1 Kanata, ON

 

 

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