| DATE | COURSE | LOCATION | STATUS | SHARE |
| Oct 14–15, 2020 | Advanced Hardware Debugging Techniques Using Vivado Design Suite | Live E-Learning | Register | |
| Oct 19–20, 2020 | FPGA Design with Vivado Design Suite: The Essentials | Live E-Learning | Register | |
| Oct 20–22, 2020 | SystemVerilog for Design | Live E-Learning | Register | |
| Oct 20–22, 2020 | Embedded System Design for the Zynq UltraScale+ MPSoC | Live E-Learning | Register | |
| Oct 20–22, 2020 | DSP Primer | Live E-Learning | Register | |
| Oct 22, 2020 | Migrating to the Vitis Embedded Software Development IDE Workshop | Live E-Learning | Register | |
| Oct 26–29, 2020 | Introduction to Universal Verification Methodology (UVM) | Live E-Learning |
Register Confirmed
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| Oct 28–29, 2020 | Designing with Xilinx Serial Transceivers | Live E-Learning |
Register Confirmed
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| Nov 10–11, 2020 | Embedded Design with PetaLinux Tools | Live E-Learning | Register | |
| Nov 10–12, 2020 | Advanced Universal Verification Methodology (UVM) | Live E-Learning | Register |
Course Schedule