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CDNLive Silicon Valley – Santa Clara, USA

Presentation: The Use of Forward Error Correction in the Cadence DisplayPort 1.4 IP Core

Speaker: Tim Corcoran and Avrum Warshawsky

Tuesday, April 11 @ 3:25 p.m.

Santa Clara Convention Center, Santa Clara, CA

Room 208

Find out more!

 

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Frame Buffer Compression IP Subsystem for TCON IC Manufacturers Launched by Hardent
Proven IP subsystem enables TCON IC manufacturers to leverage new Embedded DisplayPort low power features and significantly reduce frame buffer area using VESA DSC.
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NDT Technologies Inc.
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