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Customer Stories

DDR Interface

The Challenge

A computer manufacturer migrating to the Virtex-7 platform needed to accelerate their design cycle and required advanced FPGA training for the company’s design team.

The Solution

As experienced trainers and a Xilinx Authorized Training Provider (ATP), we developed a private class for the customer’s engineers that was delivered by an expert FPGA design engineer. Several aspects of design engineering were presented in the training, including how to implement a high-speed DDR3 memory interface. Issues in signal integrity were also addressed. Our signal integrity experts are able to quickly perform signal integrity analysis and recommend a solution to overcome relevant challenges.

Business Benefits for Customer

Private training accompanied by signal integrity analysis from Hardent’s electronic design team, equipped the company’s team with the necessary skills to quickly transform their design cycle and bring their product to market on schedule.

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Having worked in the past with independent electronic design consultants, we appreciate Hardent’s quality, team work and timely service. The company has excellent project management skills, open communication, constant follow-up and a flexible approach. We have been working with Hardent for about two years now. Though initially I was not excited about outsourcing R&D, I feel that I can 100% count on Hardent, as they know their business well and they directed us toward good technical decisions.

Michel Bitar
R&D/ I.T Manager
Prodco International Inc.
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