Rambus Completes Acquisition of Hardent
Augments world-class engineering team with deep SoC digital design expertise for Rambus CXL Memory Interconnect Initiative
Proven IP subsystem enables TCON IC manufacturers to leverage new Embedded DisplayPort low power features and significantly reduce frame buffer area using VESA DSC.
Teledyne LeCroy selects Hardent DSC video compression IP cores for the quantum M42d DisplayPort 2.0 analyzer/generator.
Kinetic Technologies selects Hardent’s IP cores to create ultra-low power MST hub with VESA DSC support.
Hardent will support AI developers, embedded developers, and system architects to develop applications using the latest Xilinx device family. [Read more…]
Mixel, Rambus and Hardent collaborate to offer a complete display IP subsystem solution.
New Xilinx Versal ACAP training courses will cover all aspects of designing with the latest Xilinx device category.
Hardent selected by Xilinx to be the new Xilinx training provider in four U.S. states.
PLC2 named as the official IP representative for Hardent’s video compression IP cores in Germany, Austria, and Switzerland.
FPGA design services and support from Hardent will enable Microchip customers to get their products to market more quickly.
We recently appointed Maojet Technology Corporation as our new IP representative for Taiwan, and Fujisoft as our new IP representative for Japan. We will be working closely with both companies to develop our IP business within these two key markets.
IP cores offer a cutting-edge mathematically lossless compression algorithm designed to facilitate the management of large volumes of raw data captured by automotive image sensors.
New IP solution combining Hardent and Xilinx IP will enable pro A/V designers to take advantage of the full DisplayPort 1.4 feature set to support resolutions up to 8K.
New PSS training course from Hardent and WHDL will cover unique Breker Trek5 UVM/SoC deployment and modeling capabilities.
New PSS training course equips engineers using Cadence Perspec with the skills needed to accelerate SoC verification.
VDC-M encoder and decoder IP cores will support the new VESA Display Compression-M standard for mobile devices requiring increased video compression levels of up to 5X.
VESA DSC and Reed-Solomon FEC IP cores enable HDMI controller manufacturers and IP providers to quickly implement new features of HDMI 2.1 and support higher resolution displays.
Combined processing capabilities will enable designers to create higher resolution displays for 4K and beyond.
ASIL-B Ready VESA DSC IP cores will enable automotive semiconductor/system suppliers and OEMs to meet stringent functional safety requirements for safety-critical automotive display applications.
Hardent, a leading Xilinx Authorized Training Provider (ATP) and a certified member of the Xilinx Alliance program, has announced that FPGA specialist and trainer Reg Zatrepalek has received an Outstanding Instructor Award for Xilinx training in North America for fiscal year 2017. [Read more…]
Hardent will show how next-generation AR and VR applications and in-car video systems can benefit from the VESA DSC (Display Stream Compression) standard to support ultra-high resolution displays.
Hardent will demonstrate how the latest features in ARM® technology enable software designers to address the specific challenges associated with designing for complex heterogeneous multicore SoCs and meeting demanding time-to-market schedules.
First live 4K display demo of the visually lossless VESA DSC standard will show how higher resolution displays for mobile and mobile-influenced markets such as AR/VR can be effectively achieved.
New products allow semiconductor manufacturers and IP vendors to take advantage of DisplayPort 1.4’s new VESA DSC (Display Stream Compression) feature to achieve higher resolution displays.
Hardent will reveal how the VESA Display Stream Compression (DSC) standard enables ultra-high definition mobile displays and simultaneous video streams for automotive applications.
Hardent, a VESA member and provider of VESA DSC IP products, announced today that it will be presenting a paper at the Cadence user group conference CDNLive EMEA, to be held May 2-4 in Munich, Germany. The paper will demonstrate how VESA DSC can be leveraged in mobile and automotive applications to create ultra high-definition displays with reduced bandwidth.
Display resolution in consumer electronics has been doubling year after year. As a consequence, the bandwidth required to achieve such resolutions has increased much faster than the serial interface speed. Electronics designers are, therefore, faced with the challenge of supporting higher resolution displays on existing display interfaces. The VESA DSC standard, released in April 2014, provides a solution to this challenge by enabling real-time, visually lossless image compression on video transport interfaces such as MIPI® DSI, DisplayPort™, and eDisplayPort.
Hardent’s paper is entitled “VESA DSC: Taking interface IPs to the next level to create higher resolution displays in consumer electronics”. The document highlights key features and benefits of the VESA DSC standard and assesses the standard’s role in today’s interface IP ecosystem, when combined with MIPI DSI, USB Type-C, DisplayPort, and HDMI IPs. Furthermore, the paper provides guidelines on integrating DSC into ASIC designs. “DSC has been widely adopted for use in portable devices with embedded displays,” says Alain Legault, VP IP Products at Hardent. “At CDNLive we will be showing how DSC can be leveraged in a number of other products and applications to create compelling ultra high-definition displays and assist designers with the challenges they face.”
Several DSC use cases of Hardent’s VESA DSC IP will be presented at CDNLive. For example, there will be a demonstration of how DSC enables power and cost savings in mobile devices by reducing the number of MIPI DSI lanes and the frame buffer size in the DDIC. Automotive designers will have the opportunity to learn how DSC enables the simultaneous transport of parallel video sources over the same cabling. Additional DSC use cases such as AR/VR applications, professional video transport, and 8K digital TV will also be discussed.
CDNLive attendees are invited to attend Hardent’s presentation on May 2, 2016. To complement the paper, a live demonstration of VESA DSC will be shown at the Designer Expo throughout the event. A joint demonstration of Hardent’s VESA DSC IP and Cadence’s MIPI DSI IP will also be shown at CDNLive EMEA.
For more information about VESA DSC, or to request a private demo of Hardent’s IP products, contact Hardent.
SDSoC tool support and training will enable embedded software developers to boost software performance with hardware.
Hardent, a Xilinx Authorized Training Provider (ATP) and Certified Member of the Xilinx Alliance Program, announces that it is now offering support services and training for the Xilinx® SDSoC™ Development Environment. Embedded software developers will be able to take advantage of one of the latest Xilinx tools to leverage hardware acceleration on software systems.
Released by Xilinx in March 2015, the SDSoC Development Environment is part of the Xilinx SDx™ family of development environments. SDSoC is a high-level tool that encompasses many other tools, such as a C/C++ toolchain, Vivado® HLS, and the Vivado Design Suite. It allows embedded software designers to quickly explore the performance of different hardware architectures.
“The SDSoC Development Environment revolutionizes how embedded designs work with custom hardware accelerators by providing a comprehensive development environment in which designers can easily decide which elements of their design are to remain in software and which are to be accelerated in hardware, without having to actually manually implement the hardware.” says Shaun Purvis, Embedded Specialist and SDSoC Trainer at Hardent.
To help customers understand the challenges that SDSoC solves and leverage the performance and productivity gains offered by the tool, Hardent now provides SDSoC support services and official Xilinx SDSoC training. “As a Xilinx Alliance Member, Hardent had privileged early access to SDSoC,” explains Nick Ni, SDSoC Product Manager at Xilinx. “Hardent has developed an in-depth understanding of the tool’s capabilities and has been invited to speak alongside Xilinx experts at several SDSoC events across North America.” Combining Hardent’s experience in embedded software development, FPGA design, and the Vivado Design Suite, SDSoC support services available from Hardent include creating a custom SDSoC platform, tailored Linux images, Vivado HLS optimizations, accelerator performance analysis, and customized IP modules.
As the Xilinx Authorized Training Provider (ATP) for Canada, New England and the Southeastern United States, Hardent also offers a one-day “Embedded C/C++ SDSoC Development Environment and Methodology” training course. Taught by certified SDSoC trainers, the course introduces the purpose, underlying structures, and basic functionality of the SDSoC tool, enabling embedded designers to quickly start adding hardware acceleration to a software system.
Hardent is currently offering a special limited time offer where a node-locked license for the SDSoC Development Environment is included in the price of the training. Register now for one of Hardent’s upcoming Xilinx SDSoC training sessions. For more information about support services for the Xilinx SDSoC development environment, visit Hardent’s website.
New IP products will enable DTV manufacturers to quickly implement VESA Display Stream Compression (DSC) v1.2 and develop HDR-compatible 8K products.
Hardent, a VESA® member and provider of IP products, announced today the availability of IP solutions to support VESA Display Stream Compression (DSC) v1.2 in the second quarter of 2016. These new IP products will help Digital Television (DTV) manufacturers create High Dynamic Range (HDR)-compatible 8K displays while meeting critical time-to-market constraints.
As consumer demand for ultra high-definition display products grows, designers need to find a solution for developing displays that support increased video throughput. To meet these needs, the Video Electronics Standards Association (VESA) released the VESA Display Stream Compression standard in 2014. “The VESA Display Stream Compression standard is already widely adopted in mobile embedded applications. With the new capabilities introduced in the latest DSC version 1.2, the benefits of high-quality image compression can be realized in a variety of new applications and products, such as PC monitors and digital television.” states Bill Lempesis, executive director of VESA.
VESA DSC uses real-time, visually lossless image compression to increase the amount of data carried on existing video transport interfaces such as MIPI® DSI and VESA DisplayPort™. The newly-released DSC v1.2 expands upon the capabilities of DSC v1.1 and is backward compatible with DSC v1.1. By supporting 14- and 16-bit color bit depth, as well as adding native coding for 4:2:0 and 4:2:2 in the YCbCr color space, this latest version of the standard will assist DTV manufacturers with developing HDR-compatible 8K televisions at high frame rates, along with other associated digital TV products such as STBs and DVRs. The expanded feature set of DSC v1.2 will also enable DSC to be used on DisplayPort v1.4 and other future video transport interfaces.
Hardent’s VESA DSC IP products facilitate DSC adoption and faster time-to-market. “We are delighted to expand our DSC IP product portfolio to support DSC v1.2,” explains Alain Legault, VP IP Products at Hardent. “While DSC v1.1 still remains the compression standard of choice for mobile, tablet, automotive, and video transport applications, our IP cores for DSC v1.2 will enable DTV manufacturers to quickly develop ultra high-definition displays with significantly lower risk.” Hardent’s DSC IP solutions are unique to the market and have already been adopted by several leading manufacturers across a range of industries.
“Like with all VESA standards, enhancements to the DSC standard are made possible by the collective efforts of VESA’s members. We applaud the accomplishments of member companies like Hardent that are developing the technologies and infrastructure critical to accelerating DSC’s adoption.” adds Lempesis. Hardent has been an active member of VESA’s DSC Task Group since 2013.
For more information about Hardent’s VESA DSC v1.2 IP solutions, consult Hardent’s VESA DSC IP products page.
Live demo will show how VESA DSC IP solutions assist manufacturers with developing next-generation consumer electronics with higher resolution displays.
Hardent, a VESA® member and provider of IP products, today announced that it will be presenting a live demonstration of VESA Display Stream Compression (DSC) IP solutions at CES® 2016. CES participants will have the opportunity to see firsthand how the visually lossless VESA DSC standard enables compelling ultra high-definition displays while reducing video transport bandwidth, power consumption and overall system costs.
The growing trend for higher resolution displays in consumer electronics, mobile, automotive, and video transport applications means that designers need to find a solution for developing displays that support increased video throughput. The VESA Display Stream Compression (DSC) standard enables manufacturers to leverage current video transport interfaces, such as MIPI® DSI and VESA DisplayPort™, with higher resolution displays by decreasing transmission bandwidth by up to 3X, while lowering power and reducing EMI.
Hardent will be showcasing a live demonstration of the VESA DSC standard throughout CES 2016. By comparing compressed vs. uncompressed still images and video sequences side by side, CES attendees will witness the visually lossless performance of VESA DSC in action. Participants will also have the opportunity to interact with members of the Hardent team who are active members of the VESA DSC Task Group.
To assist manufacturers with accelerating VESA DSC adoption, Hardent offers VESA DSC encoder and decoder IP cores. These IP solutions are the first of their kind on the market and have already been adopted by several licensees. “VESA DSC has clearly become the compression standard of choice for designing new high-definition display products”, says Alain Legault, VP IP Products at Hardent. “Our VESA DSC IP cores offer a low-risk, proven solution for quickly integrating the standard and meeting critical time-to-market constraints”.
Visit the DisplayPort booth (booth #20531, South Hall 1) to see a live demonstration of VESA DSC. To learn more about Hardent’s portfolio of VESA DSC IP solutions, CES attendees can also arrange a private demonstration during the event by contacting Hardent today.
ARM TechCon participants will have the opportunity to learn how to boost performance by leveraging custom accelerators on ARM-based SoCs with FPGA technology.
Hardent, an ARM Approved Training Center (ATC), has announced that it will be delivering a training session as part of ARM Training Day at ARM TechCon 2015. The training session will introduce developers to the concept of boosting performance by leveraging custom accelerators on ARM-based SoCs with programmable logic.
As ARM technology is deployed in more and more market segments, engineers are turning to training in order to stay up-to-date with the latest technology. ARM Training Day at ARM TechCon brings together ARM training partners from around the world to deliver technical training to attendees. Hardent’s training session, entitled “Boosting Performance from ‘C’ to Sky with Custom Accelerators”, highlights new techniques designed to help developers overcome the challenges faced when boosting software performance with hardware. The presentation will highlight how modern SoCs have combined ARM processing power with programmable logic allowing software to be offloaded to custom, scalable accelerators.
“Our training session at ARM TechCon is unique in that it highlights how software developers can explore beyond the typical hardware/software barrier by both using and producing the hardware at hand,” says Shaun Purvis, ARM accredited engineer and trainer at Hardent. “We look forward to sharing an example of a tool and design methodology that, when combined, can be used to successfully convert software into hardware.” At the end of Hardent’s training session, students will have learned how to partition a software defined system between software and hardware, convert C/C++ code to custom hardware and use cache coherent interfaces such as AXI ACP to reduce latencies associated with data transfers to and from accelerators. The training will take place on November 10, 2015 at the Santa Clara Convention Center.
To arrange a meeting with Hardent’s team during ARM TechCon, contact Hardent. For more information on ARM training, including Cortex-M7 and Cortex-A courses, consult Hardent’s complete list of upcoming ARM training sessions.
MIPI Alliance membership reinforces Hardent’s commitment to open industry standards and delivering innovative MIPI-compatible IP solutions.
Hardent, a leading provider of IP solutions and electronic design consulting services, has today announced that it has become a Contributor Member of the MIPI® Alliance. As a Contributor Member, Hardent will play an active role in the development of new industry specifications for mobile and mobile-influenced products.
The MIPI Alliance is a global non-profit corporation that brings together members from across the mobile ecosystem with the objective of defining and promoting specifications for standard hardware and software interfaces in mobile devices. The organization does this through a series of working groups that focus on the entire span of mobile design, from battery life to display.
As a provider of IP solutions for display-based products, Hardent intends to leverage its experience in connectivity, transport, and video display processing within the MIPI member work groups. “Open standards play a critical role in developing the next generation of mobile products,” says Simon Robin, President at Hardent. “MIPI membership offers a unique opportunity for us to work together with other member companies to drive innovation in the mobile industry and deliver cutting-edge MIPI-compatible IP products to our customers.”
To mark the start of Hardent’s MIPI Alliance membership, Hardent will be attending the MIPI Alliance Open & Demo Day to be held in Taipei on October 29, 2015. The presentation “New MIPI DSISM and VESA DSC Use Cases” will highlight the benefits and considerations for utilizing the VESA DSC standard, which Hardent was actively involved in defining as a member of the VESA DSC Task Group.
For more information on Hardent’s IP products or to find out about electronic design consulting services, contact Hardent.
The new reseller partners will support the growing international demand for Hardent’s VESA Display Stream Compression (DSC) IP solutions.
Hardent, a VESA® member and provider of IP solutions, has today announced new reseller agreements with Avant Technology, Progate Technology and RAM N.S. Technologies. With these newly-forged partnerships, Hardent will expand the international distribution of its VESA DSC encoder and decoder IP cores and deliver local sales support to customers in China, Israel, South Korea and Taiwan.
The VESA DSC 1.1 standard is increasingly being adopted by display and semiconductor manufacturers to support the development of higher resolution display products. Hardent’s new reseller network aims to support local markets with an accelerated solution for implementing the standard. By applying visually lossless compression between the application processor and the display sub-system, the standard allows manufacturers to use existing display interfaces, such as MIPI® DSI and VESA DisplayPort™, while decreasing data transmission bandwidth by up to 3X.
Hardent’s VESA DSC encoder and decoder IP cores offer a ready-made solution for adopting the VESA DSC 1.1 standard. “More and more companies are adopting our DSC IP cores as they look for a reliable and cost-effective solution to assist with developing UHD displays,” says Alain Legault, VP IP Products at Hardent. “Our reseller network reinforces our commitment to delivering our IP solutions internationally coupled with first-class local support.”
To mark the appointment of Hardent’s reseller network, a series of VESA DSC training sessions will be held in Hsinchu City, Shenzhen, Seoul and Yokohama in October. This one-day training course allows engineers to quickly understand the practical implications of designing a product compatible with the VESA DSC v1.1 standard. “We are thrilled to be part of the reseller team at Hardent and to kickstart our collaboration by bringing this unique training offering to our customers,” says Jill Chen, Sales Manager at Avant Technology.
For more information on Hardent’s IP products, or to register for an upcoming VESA DSC training session, contact Hardent or your local reseller.
The Hardent VESA Display Stream Compression (DSC) IP solution will enable Silicon Works to deliver next-generation consumer electronics products with ultra high-definition displays.
Hardent will provide brand-new ARM® Cortex®-M7 training and Cortex-A training focusing on ARM’s 64-bit processor technology to assist engineers with developing innovative embedded applications.
Hardent has announced that it will be the first ARM® Approved Training Center (ATC) to publicly deliver ARM’s newly released Cortex®-M7 training course in North America. Hardent is also extending its training portfolio to include ARM’s new 64-bit Cortex-A software development courses.
ARM Cortex processors are at the heart of today’s embedded applications, found in everything from consumer products to medical instruments. As the latest generation of ARM processors offer an extensive set of new features, embedded engineers are turning to ARM training solutions to thoroughly understand how to leverage the processors’ high-performance system interfaces to develop innovative embedded applications. “ARM training allows engineers to architect better systems and write better code by providing a comprehensive understanding of features and capabilities,” says Simon Robin, President at Hardent. “Whether it be the memory protection of the Cortex-M7 or the memory management of the Cortex-A57, students walk away with all bases covered.”
The new courses will be taught by an ARM accredited trainer with real-world experience in developing embedded applications and will be available in-person across North America, as well as online from anywhere in the world. The first ARM Cortex-M7 Software Development training sessions are scheduled for September 1-3 in Toronto and October 6-8 in Burlington and online.
Embedded engineers will have the opportunity to preview the new ARM Cortex-M7 training at the Toronto ARM/KEIL User Group meeting to be held July 22, 2015. Hardent’s embedded software specialist and ARM accredited trainer Shaun Purvis will present a training session highlighting the performance boosting capabilities of the Cortex-M7’s memory subsystem.
Register now for the Toronto ARM/KEIL User Group. For more information on ARM Cortex-M7 or Cortex-A training courses, or a complete list of upcoming sessions in your region, consult consult Hardent’s ARM training schedule.
Combination of Synopsys DesignWare MIPI DSI IP and Hardent VESA Display Stream Compression IP Enables Single and Dual High-Definition Displays
Highlights:
- The compliant and interoperable DSI solution reduces data transmission bandwidth by compressing and transmitting video signals through existing display interfaces for ultra-high resolution
- Synopsys’ complete DesignWare® MIPI® DSISM Host Controller IP and MIPI® D-PHYSM IP solution lowers integration risk for application processors, display bridge ICs and multimedia co-processors
- Hardent’s VESA DSC Encoder IP is visually lossless and decreases transmission bandwidth by up to 3X, allowing designers to use existing physical and electrical interfaces with higher resolution displays
Synopsys, Inc. (Nasdaq: SNPS) and Hardent today announced availability of a compliant and interoperable Display Serial Interface (DSI) solution that helps reduce the data transmission bandwidth in Ultra-High Definition (UHD) mobile devices. By using Hardent’s Video Electronics Standards Association (VESA) Display Stream Compression (DSC) Encoder IP, video signals can be compressed and transmitted through Synopsys’ DesignWare® MIPI DSI Host Controller IP. This enables higher-resolution displays with reduced bandwidth, while enhancing interoperability and lowering power, electromagnetic interference, and overall system costs.
Synopsys’ DesignWare MIPI DSI Host Controller IP is compliant to the latest MIPI specification v1.2. Combined with the silicon-proven DesignWare MIPI D-PHY, designers have a complete, interoperable MIPI display solution that can be easily integrated into application processors with less risk. The Hardent VESA DSC Encoder IP is compliant with VESA DSC standard v1.1 and enables visually lossless video compression between the application processor and the display system inside the system-on-chip (SoC). Hardent’s VESA DSC Encoder IP compresses and transports the video signal to one or more DSI streams utilizing Synopsys’ DesignWare MIPI DSI Host Controller and MIPI D-PHY IP.
“Electronics manufacturers leverage visually lossless compression to enable compelling displays for ultra-high-definition mobile applications,” said Alain Legault, vice president of IP products at Hardent. “We have collaborated with Synopsys, the industry’s trusted provider of high-quality IP, to provide a fully interoperable solution that will allow companies to deliver next-generation displays.”
“The evolution of displays in mobile devices has brought about new SoC design challenges,” said Joel Huloux chairman of the MIPI Alliance. “As an active contributor to the MIPI Alliance Display and PHY working groups for more than 10 years, Synopsys continues to collaborate with other ecosystem partners to establish display interface standards, drive adoption and deliver interoperable IP solutions that foster innovative products implementing MIPI standards.”
“Portable devices, including hand-held, are moving toward 4K resolution, and SoC designers must move in this direction without sacrificing battery life, weight and cost,” said Bill Lempesis, executive director at VESA. “Working with the MIPI Alliance, we’ve established a DSC standard that addresses these requirements. Hardent was an active member of VESA’s DSC Task Group and contributed to the standard, and we’re glad to see this collaboration between Synopsys and Hardent to help enable this new technology for product development.”
“By collaborating with Hardent, we are providing designers with an interoperable and compliant solution that enables them to support ultra-high-definition mobile displays,” said John Koeter, vice president of marketing for IP and prototyping at Synopsys. “As the leading provider of MIPI IP with more than 200 design wins, Synopsys provides designers with a complete high-performance, low-power DesignWare MIPI DSI IP solution that helps them implement the required functionality into SoCs for the mobile and consumer markets.”
Availability
Synopsys’ DesignWare MIPI IP solutions including DSI v1.2 and CSI-2 v1.2 Host Controllers and D-PHY v1.2 are available now. The Hardent VESA DSC Encoder IP is available now.
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world’s 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP, and is also a leader in software quality and security testing with its Coverity® solutions. Whether you’re a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products.
Learn more at www.synopsys.com.
About Hardent, Inc.
Hardent is a professional services firm providing engineering, IP products and training to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics and are specialized in ASICs, FPGAs, DSPs, embedded software, FPGA video processing and system on chip (SoC) design. Hardent’s consultants are trusted advisers in developing high-complexity products, improving engineering processes, providing expert training solutions and accelerating products’ time-to-market.
Learn more at www.hardent.com.
CES participants will be able to see how Hardent’s encoder/decoder IPs enable manufacturers to quickly integrate VESA DSC technology into ultra high-definition products.
Hardent will showcase the first ever public demonstration of VESA Display Stream Compression (DSC) encoder and decoder IPs at the VESA DisplayPort booth during CES 2015. Electronics manufacturers will have the opportunity to see firsthand how these ready-made IP solutions can assist with accelerating VESA DSC adoption, simplifying interoperability, and leveraging current industry transport mechanisms.
The growing trend for higher resolution displays in smart phones, tablets, and ultra-high definition television brings additional challenges for electronics manufacturers, as high-throughput video needs to be carried between device’s components. Released in April 2014, the VESA Display Stream Compression (DSC) Standard applies visually lossless video compression between the application processor and the display sub-system inside devices, allowing manufacturers to leverage current industry transport mechanisms such as MIPI® DSI and VESA DisplayPort™.
Hardent’s VESA DSC-compliant encoder and decoder IPs are the first of their kind on the market and provide companies with a ready-made IP core to assist with the quick adoption of the VESA DSC standard. “The advantages of adopting the VESA DSC standard are numerous”, says Alain Legault, Principal at Hardent. “We invite CES attendees to come and see VESA DSC video compression in action.”
Visit the VESA DisplayPort booth (#20624, South Hall #1, ground level) for the chance to see a demonstration of Hardent’s real-time video compression IPs. Arrange a private demonstration of the VESA Display Stream Compression (DSC) encoder/decoder IPs at CES 2015 by contacting Hardent today.
About Hardent
Hardent is an electronic design company providing IPs, electronic design services, training solutions, and management consulting, to leading electronics equipment and component manufacturers throughout the world. As a member of VESA’s DSC Task Group, the company has played an active role in developing the latest standards in real-time video compression and display technology. Hardent’s team of electronic design engineers and consultants has extensive experience in video-related projects, focusing on different aspects of the industry including video connectivity, transport, codecs and processing. Find out more about Hardent’s ASIC and FPGA design work for the video industry.
To complement the X-fest experience, Hardent will be offering participants the opportunity to define a complete FPGA design training plan tailored to their individual needs.
Hardent, a leading Xilinx® Authorized Training Provider (ATP), has announced that it will help X-fest participants define a personalized FPGA design training plan. Avnet’s X-fest events are held throughout the world each year and offer FPGA designers the opportunity to learn about Xilinx’s latest technology and product development methodology through practical training seminars. Participants who would like to expand their knowledge of topics covered during Avnet’s X-fest seminars will be able to discuss their individual training needs and professional goals with Hardent’s team during the X-fest events in Boston, Montreal, and Toronto this fall.
Today’s FPGA, SoC, DSP, verification and embedded systems engineers face many challenges, in particular the need to get up to speed with recent innovations in technology and understand their impact for electronic product development. Whether it is understanding the latest Xilinx UltraScale™ architecture or Zynq®-7000 All Programmable SoCs, having the knowledge to implement the latest technology is key to developing innovative electronic products and helping designers advance in their careers. “The X-fest seminars are a great opportunity for participants to find out about the latest features and benefits of Xilinx technology”, says Simon Robin, President at Hardent. “Consequently, electronic designers often realize the need to expand their knowledge of certain subjects and improve their professional skill set.” Developing a personalized training plan with Hardent will allow both hardware and software designers to take topics covered during the X-fest seminars to the next level, while also addressing their individual professional development goals.
As a Xilinx ATP, Hardent offers FPGA design training such as “Designing with the Ultrascale Architecture”, “Zynq All Programmable SoC System Architecture” and “Hardware/Software Co-design for the Xilinx Zynq Virtual Platform”. These courses are just some of the options available that act as a natural progression to the topics covered during this year’s X-fest seminars and equip designers with both the theoretical and practical knowledge to be able to independently leverage these technologies in their work. Courses are taught using a variety of learning methods, with students having the flexibility to choose between learning in-person with an instructor or taking a training course online from their home or office.
Hardent is a leading electronic design company specialized in FPGA design and FPGA training solutions. As a Xilinx ATP for New England, the Southeastern United States and Canada (excluding BC), and an ARM Authorized Training Center (ATC) for North America, Hardent has trained over 7,000 engineers worldwide since 2007. All trainers at Hardent are experts in their field and bring real-world engineering experience to the classroom.
Register now for one of the upcoming Avnet X-fest events in Boston, Montreal, and Toronto.
Find out further information about FPGA design training from Hardent’s team at the X-fest events or consult Hardent’s website for the complete list of upcoming Xilinx training courses.
About Hardent
Hardent is a professional services firm providing training, engineering and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics and are specialized in ASICs, FPGAs, DSP design, system verification, embedded software, and system on chip (SoC) design. The company is committed to developing high-complexity electronic products, improving engineering processes, accelerating products’ time-to-market and providing expert training solutions.
Hardent Inc. introduces the world’s first video compression training on the recently-adopted VESA DSC (display stream compression) standard.
Hardent, a member of VESA and a leading consulting firm providing training, electronic design, and management consulting services, has announced that it is now offering the world’s first video compression training focused on the recently-adopted VESA DSC (display stream compression) standard. The first training sessions will be held in Asia this fall.
The current trend for real-time video compression in products such as mobile phones, tablets and ultra-high definition television (UHDTV), presents multiple electronic design challenges. Hardent’s display stream compression training enables system architects, engineers and designers to get up to speed quickly with the very latest video compression technology and understand the practical implications of designing a product compatible with the VESA DSC v1.1 video compression standard. “With our DSC training, companies will better understand how adopting the VESA DSC standard can help them lower overall system costs, save power and reduce electromagnetic interferences (EMI) in their products,” says Alain Legault, Principal at Hardent.
Hardent’s video compression training comes as a natural extension to the company’s experience of ASIC, SoC and FPGA design challenges in the video industry and active involvement with the VESA DSC Task Group that defined the VESA DSC v1.1 video compression standard. In April 2014, Hardent also announced the release of the first VESA-compliant DSC decoder intellectual property (IP), providing electronics manufacturers with a top-quality, ready-made solution to accelerate adoption of the VESA DSC standard in their product development.
As a Xilinx® Authorized Training Provider, ARM® Approved Training Center, and provider of system-level design and verification training, Hardent has trained over 7,000 engineers worldwide since 2007. Trainers at Hardent are also active engineers and focus on the practical application of concepts taught during training. Hardent’s video compression training will be provided by a senior electronic design engineer who participated in VESA’s DSC Task Group and who has extensive experience in both broadcast and consumer video product development.
The one-day VESA DSC training will offer an insight into the underlying structure of DSC video algorithms, DSC applications, usage models, system architecture, as well as implementation challenges for DSC encoder and decoder designs. Students will also gain an understanding of the resources available at VESA and the considerations for designing a product compatible with the VESA DSC v1.1 video compression standard.
The training will be launched early this fall in Seoul, South Korea and Tokyo, Japan. Additional course dates in other countries will be added to the Hardent training schedule in the coming months. Upon request, Hardent also offers customers the option of private, customized classes catered to individual team needs. To register for Hardent’s VESA DSC training, or to discuss a private video compression training, please contact Hardent.
About Hardent
Hardent is a professional services firm providing training, engineering and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics and are specialized in ASICs, FPGAs, DSPs, embedded software, FPGA video processing and system on chip (SoC) design. The company is committed to developing high-complexity electronic products, improving engineering processes, accelerating products’ time-to-market and providing expert training solutions.
To allow engineers to benefit from hands-on online software design training, Hardent has redeveloped its Xilinx embedded software design courses using the ZYBO Zynq Board.
Hardent, a leading Xilinx® Authorized Training Provider and ARM® Approved Training Center, has announced that it has redesigned its embedded software design training for the online classroom. The training is provided live by expert trainers and a Digilent® ZYBO Zynq™-7000 development board is made available to each student in the course to assist embedded software developers in reducing time-to-market using the latest technologies.
As embedded software design technologies continue to evolve at an ever-increasing pace, more and more engineers are looking to expand their expertise through embedded software design training in order to accelerate development and enhance product quality. “An in-person course is obviously the preferred manner,” says Simon Robin, president of Hardent, Inc., “but nowadays many engineers are short on time and budget, and most developers are looking to stay up-to-date with online training.” Online training courses at Hardent focus on the practical aspects of embedded software design, enabling engineers to apply their newly developed skills in their current projects while acquiring experience with the latest tools.
The first of Hardent’s embedded software courses to use this new online format is Xilinx’s “Embedded Design with PetaLinux Tools.” To ensure that the online embedded software design training includes practical hands-on exercises, Hardent provides participants with the opportunity to either borrow or purchase the ZYBO Zynq development board. Students who choose to purchase the board have the opportunity to re-run the training labs or use the board for their own development projects. “As the ZYBO is a feature-rich, price accessible board, it enables Hardent students to learn Xilinx’s Zynq architecture in an online setting,” says Larissa Swanland, Marketing Manager of Digilent, Inc. In addition to the ZYBO Zynq development board, each online course participant receives a set of headphones and printed training material. Throughout the session, Hardent’s experienced trainers interact live with students to assist them with any questions they may have relating to the course or their current embedded design projects.
Hardent offers a wide variety of both in-person and online courses covering topics such as embedded software design, Xilinx FPGA training and ARM courses. Trainers at Hardent are experts in their field, bringing their real-world engineering background to the classroom. Hardent has trained over 7,000 engineers worldwide since 2007. For further information regarding the online “Embedded Design with PetaLinux Tools” course or any other embedded software design training course, consult Hardent’s training schedule.
About Hardent
Hardent is a professional services firm providing training, engineering and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics and are specialized in ASICs, FPGAs, DSPs, embedded software, FPGA video processing and system on chip (SoC) design. The company is committed to developing high-complexity electronic products, improving engineering processes, accelerating products’ time-to-market and providing expert training solutions.
Hardent Inc. introduces the first real-time video compression intellectual property (IP) technology that is VESA Display Stream Compression (DSC)-compliant. This decoder will facilitate electronics manufacturers with accelerating time-to-market for ultra high-definition resolution products.
Hardent, a leading electronics consulting company specialized in ASIC and FPGA design services, announces the release of a video compression intellectual property (IP) technology to assist consumer electronics and video equipment manufacturers in the development of SoC, ASIC and ASSP display technology compliant with the latest Display Stream Compression (DSC) standard from the Video Electronics Standards Association (VESA®). The DSC decoder IP is the first of its kind on the market, enabling electronics manufacturers to use a ready-made quality solution to accelerate DSC adoption.
Real-time video compression has become ubiquitous for mobiles, tablets and ultra high-definition television (UHDTV) applications. By applying visually lossless video compression between the application processor and the display sub-system inside devices, VESA DSC allows manufacturers to leverage current industry transport mechanisms (MIPI® DSI, VESA DisplayPort™) in the ever-increasing display resolution product trend. “The processing and transport bandwidth requirements of 4K, UHD and emerging 8K resolutions applications impose new design challenges.” says Simon Robin, president of Hardent Inc. “We anticipate that companies will adopt the Display Stream Compression (DSC) standard in their products to help lower costs, save power and reduce electromagnetic interferences (EMI).”
Hardent has been an active member of VESA’s DSC Task Group and contributed to the development of the latest standards in real-time video compression and display technology. “Our unique position, as part of the VESA DSC Task Group, has allowed Hardent to design a top-quality IP with a true understanding of the interoperability and standard compliance design considerations,” explains Alain Legault, principal at Hardent. “By using Hardent’s DSC decoder IP, electronics manufacturers will be able to take full advantage of an existing IP core with a verification environment supported by high-quality professional services, saving the time and trouble associated with redesigning an industry standard decoder.”
Hardent’s team of engineers and consultants has extensive experience in video-related projects, focusing on different aspects of the industry including video connectivity, transport, codecs and processing. Learn more about Hardent’s design work for the video industry. If you would like to receive more information regarding the VESA-compliant Display Stream Compression (DSC) Decoder IP, please contact Hardent.
About Hardent:
Hardent is a professional services firm providing training, engineering and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics and are specialized in ASICs, FPGAs, DSPs, embedded software, FPGA video processing and system on chip (SoC) design. Hardent consultants are trusted advisers in developing high-complexity products, improving engineering processes, providing expert training solutions and accelerating products’ time-to-market.
ARM® has certified Hardent as an ARM Approved Training Center (ATC) as it extends the reach of training courses for embedded developers in North America.
Hardent, a leading Xilinx® Authorized Training Provider (ATP), has received certification as an ARM Approved Training Center. Hardent has taken the initiative to promote and deliver the company’s full training curriculum from coast to coast as part of the ARM Approved Training Center program.
Chris Shore, ARM ATC program manager, said: “Hardent’s development and consulting expertise across the industry ensures that its ARM training programs will provide developers with a baseline solid curriculum applied to practical application. This partnership will significantly increase access for engineers to gain expertise with ARM processor technology in North America.”
Becoming an ARM ATC complements Hardent’s existing offerings that include Xilinx training, WHDL functional hardware verification courses and other industry-related classes. “Having ARM Accredited Engineers (AAE) and offering ARM and Xilinx training under the same roof enables our clients to master these interrelated development technologies,” says Simon Robin, Hardent’s president. “Hardent intends to encourage embedded developers to strengthen their knowledge of ARM technology.” Additionally, as an ARM and Xilinx training house, Hardent will have the opportunity to offer customized courses that can cover all stages of designing and developing with the ARM-based Xilinx Zynq™ All Programmable SoC from both a hardware and a software perspective.
Hardent will offer a variety of ARM training courses including ARM Cortex®-A Software Development, ARM Cortex-M Embedded Software Development, and ARM Embedded Software Optimization. Moreover, Hardent training can now assist developers in mastering both ARM’s advanced processor technology and Xilinx’s latest programmable logic technology. Specialized courses, such as the Xilinx Zynq All Programmable SoC System Architecture, will help design teams reduce time-to-market and enable the creation of cutting-edge embedded applications.
Hardent ensures that embedded developers have access to high-quality and approved courses in various regions. Find out more about Hardent’s training. For preregistration and securing your space, please check Hardent’s ARM training courses.
About Hardent
Hardent is a professional services firm providing training, engineering and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics, especially with ASICs, FPGAs, DSPs, embedded software, video processing and system on chip (SoC) design. Hardent consultants are trusted advisers in developing high-complexity products, improving engineering processes, enhancing the team’s skills and accelerating products’ time-to-market.
Hardent’s program enables companies to adopt the latest Xilinx devices and the Vivado design tool, making use of the UltraFast design methodology, converting constraints files from UCF to XDC and using Tcl scripting as a unified scripting language.
Hardent has announced today the introduction of a new program for accelerated migration from Xilinx’s ISE to the Vivado® Design Suite. Hardent’s new program enables companies to deploy leading-edge technology from Xilinx with a minimal learning curve and an easy guided transition that is supported through training and by experienced consultants.
As companies consider designing with Xilinx’s 7 series, Zynq® or the recently announced UltraScaleTM devices, Xilinx recommends that customers migrate to the Vivado Design Suite. Vivado facilitates the implementation of the UltraFast Design Methodology and the use of Tcl as a unified scripting language, introduces a plug-and-play style of IP integration, and consolidates several, previously separate, tools into a single integrated development environment. Advanced requirements in today’s increasingly complex electronic systems are stretching the boundaries of density, performance and power. Tools such as the ISE Design Suite will no longer be able to resolve the interconnect bottleneck and promote the productivity required. In order to properly transition from the familiar ISE design tool to Xilinx’s Vivado Design Suite, system architects and design engineers are required to go through a learning curve. In an effort to avoid a lengthy transition process, Hardent has developed an accelerated implementation program.
Hardent’s new accelerated migration program will assist clients in shifting smoothly to Xilinx’s Vivado Design Suite, including converting constraints files from UCF to XDC, migrating IP to 7-Series or UltraScale devices, porting projects from ISE to Vivado, re-scripting and building automations using Vivado Tcl scripts or implementing advanced flows such as Hierarchical design, IP Integrator (IPI) and Revision control (SVN). Hardent is in a unique position to both train and provide professional services. To ensure a fast transition of knowledge, Hardent offers many complementary courses such as: Vivado Design Suite for ISE Project Navigator Users, Vivado Design Suite Advanced XDC and STA for ISE Users and Essential Tcl Scripting for the Vivado Design Suite. Hardent’s experts can tailor training courses and services to the specific needs of a customer. Hardent’s experienced consultants can advise companies on how to incorporate Vivado methodologies and features into new and existing projects.
Being a certified member of the Xilinx Alliance Program, Hardent engineers have early access to the latest Xilinx tools and features and thus they have the necessary expertise to provide companies with an accelerated path to reduce time-to-market development. For further information about Hardent’s accelerated implementation program for the Vivado Design Suite, visit the accelerated Vivado adoption program. To learn more about how Hardent consultants can shorten your migration path and enable your employees to quickly master the Vivado Design Suite, contact Hardent’s consultants.
About Hardent
Hardent is a professional services firm providing training, engineering and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics, especially with ASICs, FPGAs, DSPs, embedded software, FPGA video processing and system on chip (SoC) design. Hardent consultants are trusted advisers in developing high-complexity products, improving engineering processes, enhancing the team’s skills and accelerating products’ time-to-market.
Hardent increases involvement in the development of industry standards for System-on-Chip (SoC) video processing design.
Hardent, a leading consulting company for FPGA and ASIC design, has become a voting member of the Video Electronics Standards Association (VESA) in order to influence the future directions of the display industry. As a member of VESA, Hardent will contribute to the development of the latest standards in video processing and display technology.
Hardent provides leading-edge ASIC and SoC design services to electronics manufacturers that incorporate display technology in devices such as smartphones, tablets and TVs. Manufacturers aim to lower costs, increase display resolutions, increase autonomy with energy efficient designs and reduce electromagnetic emissions while keeping up with the rapidly changing standards. Electronics manufacturers find it challenging to address the technical issues faced when integrating IP supporting new industry video standards in their SoC design. “Hardent combines the company’s ASIC and FPGA expertise with deep knowledge in emerging VESA standards to assist clients meet strict time-to-market deadlines,” says Alain Legault, Principal at Hardent. “By collaborating on the latest standards we acquire state of the art knowledge and expertise that is allowing us to accelerate SoC design schedules for our clients by making the design, verification and integration work much easier for them.”
Hardent intends to participate in the creation of standards for the Display Stream Compression (DSC) video compression algorithms as part of the Display Stream Compression Task Group. Hardent’s involvement in VESA and the DSC Task Group will enable the company to influence future developments in the display industry. The DSC Task Group meetings give Hardent the opportunity to network with industry experts such as Apple, Broadcom, Intel, Qualcomm, Toshiba and Samsung, while participating in state-of-the-art technical discussions.
For more information about Hardent’s FPGA and ASIC design services for electronics manufacturers, please visit the electronic design services page. To learn more about Xilinx and Hardent training courses, visit the training section.
About Hardent
Hardent is a professional services firm providing training, engineering and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics, especially with ASICs, FPGAs, DSPs, embedded software, FPGA video processing and system on chip (SoC) design. Hardent consultants are trusted advisers in developing high-complexity products, improving engineering processes, enhancing the team’s skills and accelerating products’ time-to-market.
Hardent’s dedicated Xilinx FPGA support services strive to provide users with the best solutions through continuity in support from assigned FPGA experts.
Hardent announced today that over the past few months, it has seen a significant growth in demand for the company’s Xilinx® FPGA support services. Hardent’s dedicated technical support services are meant to address a growing need for proactive and reactive support requirements in the electronic design engineering community.
“As electronic design engineer’s struggle to meet tight deadlines while delivering highly complex implementations, every delay can be detrimental,” says Simon Robin, Hardent’s President. “Our highly-responsive and experienced team is trained to identify FPGA issues and suggest a solution with a quick turnaround, in order to ensure the best results in the shortest time possible.” Being a certified member of the Xilinx Alliance Program, Hardent has privileged access to the best available resources and data, as well as access to Xilinx technical support personnel.
Hardent’s FPGA designers are adept with the latest Xilinx technology and best practices, as the company also offers Xilinx FPGA training, engineering mandates and management consulting. Furthermore, Hardent’s experience as an exclusive Xilinx training provider benefits customers with the optimal balance of support and training for fast technical resolution. Users will be guided throughout the process by dedicated FPGA experts that are assigned to each client; this ensures continuity of service and bypasses the learning curve created when dealing with a new service agent with each call. To further enhance and simplify the process, our experts can also open web cases on behalf of the customer. These are just a few of the procedures designed to certify that FPGA support goals will be met.
Hardent’s paid-for Xilinx FPGA support services are aimed at providing companies of all sizes with customer-centric support solutions, reacting to issues as they arise or making certain that FPGA processes are on the right track. Whether a company is trying to accomplish a complex embedded implementation using ASIC technology, dealing with new technology such as the Xilinx Zynq® All Programmable SoC or the Vivado® Design Suite, experiencing unexpected delays or implementing FPGA technology for the first time, Hardent’s paid-for FPGA support services are able to guide the client every step of the way; grasping the problem and finding a solution. “Hardent’s FPGA support goes beyond the typical technical support,” says Michel Turgeon, VP WorldWide Sales. “By trusting Hardent to conduct a simple assessment at the early stages of your project, we will provide recommendations to ensure objectives are met. If you are already faced with a problem we will help you resolve it and provide the appropriate guidance to avoid similar problems in the future. In either case we commit to your success.”
For more information about Hardent’s paid-for Xilinx FPGA support services, please send an FPGA technical support inquiry. To learn more about Xilinx and Hardent training courses, visit the training section.
About Hardent
Hardent is a professional services firm providing training, engineering and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics, especially with ASICs, FPGAs, DSPs, embedded software and system design. Hardent consultants are trusted advisers in developing high-complexity products, improving engineering processes, enhancing the team’s skills and accelerating products’ time-to-market.
The complimentary seminars about various FPGA verification methodologies demonstrate how to use automation tools to accelerate design verification flow
Hardent has announced a collaboration with Electro-Source, Mentor Graphics and Xilinx to present two Advanced FPGA Verification seminars. These seminars will cover topics in verification automation, including FPGA assertions, coverage and UVM Express, using the Questa® Advanced Simulator and ModelSim® products.
The seminars, aimed at FPGA designers, verification engineers and team leaders, will introduce new trends in FPGA verification methodologies and expand upon the uses of Vivado® design flows. With the continued growing complexity of FPGAs, design verification flow has never been more essential to the design process. Thus, FPGA professionals have a greater reliance on verification automation technologies.
“In today’s environment, verifying a design is the most challenging task. While it is one of the major bottlenecks in meeting project deadlines, these efforts cannot be compromised,” said Hardent President Simon Robin, “With more automation comes better results.” The seminars will cover the benefits of the FPGA verification process and Vivado design flows, as presented by a Hardent FPGA specialist. Other topics covered will include methods to reduce time-to-market and how to build effective testbench infrastructure, as well as tips to implement automation into your FPGA verification process.
The two seminars will take place on June 11 and 13, 2013 in Waterloo and Ottawa, respectively. For information about the seminar schedule, please check the attached document. Register here for the FPGA verification seminars. If you are unable to attend or would like to learn more about FPGA verification, check Hardent’s functional verification training courses.
About Hardent
Hardent is a professional services firm providing training, engineering and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics, especially with ASICs, FPGAs, DSPs, embedded software and system design. Hardent consultants are trusted advisers in developing high-complexity products, improving engineering processes, enhancing the team’s skills and accelerating products’ time-to-market.
Extending the training curriculum to include functional verification courses, enables engineers to learn how to ensure that their logic design conforms to specification by using SystemVerilog and Universal Verification Methodology (UVM)
Hardent Inc., a highly experienced electronic design training academy and a Xilinx Authorized Training Provider, announces its collaboration with Williamette HDL (WHDL) to deliver a new line of training courses in functional hardware verification.
Functional verification has become a critical component of electronic development in achieving a better time-to-market and cost efficiencies. The increases in the complexity and size of today’s System on Chips (SoCs) have intensified the challenges of hardware verification. “Engineers are expected to deliver products with sophisticated functionalities, shorter delivery time and remarkable quality” says Mike Baird, President and Founder of Willamette HDL. “With the practical experience of the instructors, verification engineers will learn to effectively master best-practice usage of the SystemVerilog features and UVM verification.”
Over the last year, Hardent has received an increased demand for functional hardware verification courses. With the addition of the new training courses, Hardent addresses the need of verification engineers. “Our goal is to provide a complete training basket” says Simon Robin, founder and President of Hardent, Inc. “Using the WHDL training material was a natural choice for Hardent as it has become the industry standard for teaching languages and advanced modeling for optimal simulation and synthesis results. This alliance complements our well-established training relationship with Xilinx and we are open to exploring potential engagement with other partners.”
In addition to Xilinx’s Verification with SystemVerilog training, Hardent introduces additional functional verification courses created by WHDL, resulting in over 10 courses on the subject of functional verification. Some of those course subjects are: SystemVerilog for Verification, OVM to UVM Transition, Open Verification Methodology (OVM) and Advanced Universal Verification Methodology (UVM). The classes run from one to four days and range from introductory to advanced level.
For more information about SystemVerilog, OVM, UVM and functional verification training, visit Hardent’s Website to register and secure your space today.
About Hardent
Hardent is a professional services firm providing training, engineering and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics, especially with ASICs, FPGAs, DSPs, embedded software and system design. Hardent consultants are trusted advisers in developing high-complexity products, improving engineering processes, enhancing the team’s skills and accelerating products’ time-to-market.
About Williamette HDL
Willamette HDL delivers services and products to help language-based hardware design projects be more successful. Founded in 1993, WHDL has an extensive offering of technology training for SystemVerilog, SystemC, Verilog and VHDL. The company specializes in System Level Verification, which is central to training classes available from WHDL. For more information, go to http://www.whdl.com
The companies have teamed up to offer a one-of-a-kind introduction course that covers Electronic System Level (ESL) best practices using hardware / software co-design to create improved embedded systems code and provide engineers a faster design development cycle with lower SoC design costs
Space Codesign Systems and Hardent are proud to announce a new training course on electronic system level (ESL) methodology and Hardware/Software Co-design for the Xilinx Zynq “All Programmable SoC” platform. This course shows how the Xilinx Zynq “All Programmable SoC” platform can be abstracted and modeled in a fully functional software representation of a hardware/software SoC design based on a mix of processors (Cortex-A9 dual MPCore and MicroBlaze), software, communication links (AXI interconnects), memories, and other IP cores.
“For many years, electronic system level (ESL) design could only be achieved in major electronics firms or at university research labs. Today, the adoption of ESL methodologies is a necessity for all in order to reach better time-to-market” said Guy Bois, founder, President and Chief Scientist of Space Codesign. “Hardent’s introduction of this technology in a formal and structured training is a unique opportunity for Xilinx Zynq developers, both new and experienced, to increase their productivity and improve the quality of their codes, while reducing their development time.”
In this class, students will receive a practical introduction of ESL design methodologies and the concept of platform-based design. The design is modeled at a high level of abstraction, called a “virtual platform”. This course provides a hands-on learning experience through labs on how the Xilinx Zynq “All Programmable SoC” platform can be abstracted and how to leverage Xilinx’s ISE™ and Vivado™ tools to achieve better results with a Zynq-based board.
The course will also use Space Codesign’s SpaceStudio™, an ESL hardware/software codesign software tool, to demonstrate how engineers can work at a higher system-level in order to better explore the design options with modern multicore architectures such as the dual-core ARM® Cortex™ A9 processor featured in the latest Xilinx® programmable platform.
“Adding ESL and Hardware Software Codesign is a natural progression to our training class offerings,” said Simon Robin, founder and president at Hardent, Inc. “Since last summer, Hardent has been training engineers on the Xilinx ‘All Programmable SoC’ and its tools. Space Codesign’s technology complements the Xilinx design tools with a higher level of abstraction. By working at a higher system-level with ESL and by performing hardware/software codesign, Zynq developers will better leverage Xilinx tools to improve the ROI of the board.”
The students in this course will receive the most authoritative material in the field, such as found in the book “ESL Design and Verification: A Prescription for Electronic System Level Methodology (Systems on Silicon)” written by Grant Martin, Brian Bailey and Andrew Pizali. For further information about this new training, please read the course syllabus on Hardent’s site or check the PDF file attached to this press release.
About Hardent
Hardent is a professional services firm providing engineering, training and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics, especially with ASICs, FPGAs, DSPs, embedded software and system design. Hardent consultants are trusted advisers in developing high-complexity products, improving engineering processes, enhancing the team’s skills and accelerating products’ time-to-market.
About Space Codesign Systems
Space Codesign® Systems, Inc. is the developer of SpaceStudio™, the only ESL (Electronic System Level) design technology that enables end-to-end automated hardware/software codesign – from high-level functional specification to the architectural and RTL (Registered Transfer Level) coding phase. This automation enables electronics engineers to enjoy a higher level of abstraction and executable representation for embedded systems design in industries such as aerospace and commercial multimedia applications. SpaceStudio is distributed worldwide. On the US west coast, EDATechForce handles Space Codesign’s sales.
Increasing revenue from management consulting services in the area of electronics product development leads Hardent to expand the consulting team.
Hardent announced today that the management consulting services division has generated significant revenue since the services were launched. Hardent, a professional services company for the electronics and semiconductor industry, introduced a range of executive consulting solutions last year. Following increasing demand for the consultancy services, Hardent is now expanding its team of senior consultants.
“More than 10% of Hardent’s revenue can now be attributed to our management consulting services,” said Simon Robin, Founder of Hardent. As competition in the electronics and semiconductor industry intensifies, companies are being forced to release new products with enhanced functionality and higher performance yet developed. Executives in electronics companies are under great pressure to reduce the time-to-market while optimizing development processes. Executives are also required to adapt to change by developing strategies to mitigate risks.
Recently, Hardent hired Alain Legault as principal consultant to broaden its consulting expertise. Legault brings to Hardent an extensive experience in product development in the area of broadcast , image-processing and telecom electronics. While employed in executive positions at companies such as Matrox and Octasic, Legault dealt with a variety of electronic product development challenges and worked with international industry giants, including Apple, Adobe and Microsoft.
“We guide leaders through strategic, management, operational, recruitment and many other business concerns related to the development of electronics and integrated products and components,” said Alain Legault. Hardent customizes each of the management consulting services to correspond with the specific needs of organizations. For each client’s challenge, Hardent assigns the senior consultant with the most suitable background to efficiently resolve the issue.
For further information about addressing executive-level product development challenges, visit Hardent’s electronics management consulting page and learn how to optimize your organization’s product development life cycle.
About Hardent
Hardent is a professional services firm providing engineering, training and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics, especially with ASICs, FPGAs, DSPs, embedded software and system design. Hardent consultants are trusted advisers in developing high-complexity products, improving engineering processes, enhancing the team’s skills and accelerating time-to-market.
New service from Hardent offers electronic design engineers the freedom to take on-demand continuing education courses online on their own terms.
Hardent announced today the offering of on-demand Xilinx online courses, a new service that was developed in collaboration with VAI Technology. As an exclusive authorized Xilinx training provider for Canada and much of the east coast of North America, Hardent is constantly evolving and utilizing new technology to better service the semiconductor and electronics industry worldwide.
Given the fast-paced nature of the industry, companies face increased pressure to deliver their electronics products while adhering to tight schedules. As such, electronic design engineers, HDL designers and system architects find it difficult to stay up to date with the latest cutting edge technology and allocate the time to attend training sessions. “For the last 16 months, Hardent has also been offering online training with a live instructor, a service that has become very popular“ said Simon Robin, CEO and founder of Hardent. “The new electronics training courses will give students higher level of autonomy and flexibility, as a complement to the live instructor-led offering.”
The new online electronics courses will offer students the ability to follow the course online at the pace, schedule and setting of their choice. “Now that Hardent is offering Xilinx online training courses 24/7, our customers can keep pace with the latest technology and learn new skills on their own terms without impacting deadline commitments for key projects or making difficult scheduling trade-offs,” said Jason Fegley, Global Training Solutions Manager at Xilinx.
Pre-recorded, these training sessions will be offered by the same experienced instructors that Hardent uses for both their face-to-face and live online training. To introduce the new on-demand training service, Hardent has chosen to offer two courses in online format: “The Essentials of TCL Scripting” and “The Essentials of the 7 Series FPGAs”. As the demand grows, Hardent will introduce additional online course subjects allowing engineers to get more electronics training online.
For further information on how to sign up to one of Hardent’s new on-demand online electronics courses, please visit Hardent’s Website. To take a course with a live instructor, visit the live online training section.
About Hardent
Hardent is a professional services firm offering engineering, management consulting and training in the electronics and semiconductor industry. It serves as a partner in improving product engineering processes, enhancing team skills and accelerating time-to-market to increase the company’s competitive advantage. Hardent helps its customers become leaders in their fields by understanding their needs and challenges and offering innovative solutions through result-oriented problem-solving consulting, engineering and training/coaching professional services.
Hardent to meet Latin American semiconductor and electronics leaders that seek faster time-to-market in their design and development processes
Hardent, a leading professional services firm for the electronics and semiconductor industry, announced today that the company will exhibit at the Futurecom 2012 conference in Brazil.
Futurecom, one of the major telecommunications and IT events in Latin America, takes place from October 8-11 in Rio de Janeiro and hosts more than 15,000 attendees from more than 40 countries, as well as an industry-recognized trade show with more than 200 exhibitors.
Hardent is exhibiting at the ICT Canada booth (# G10) – an organization created by the Canadian Consulate in Sao Paulo to promote knowledge of advanced technologies in the Canadian market, promote the execution of business between Canada and Brazil’s ICT sectors and keep companies informed about news and opportunities for collaboration.
“With the increasing demand for high-speed and high density electronic circuits, Brazilian telecom and other equipment makers are seeking guidance on how to accelerate the design and development of their products,” said Simon Robin, CEO and founder of Hardent. “We are building close relationships with executives in this industry and serve as a guiding expert to companies who want to become more effective throughout the electronic design process.”
Hardent will host working sessions during the event with leading semiconductor and electronics players in Brazil and encourages interested companies to contact the company directly or through the ICT Canada Facebook or LinkedIn pages.
About Hardent
Hardent is a professional services firm offering engineering, management consulting and training in the electronics and semiconductor industry. It serves as a partner in improving product engineering processes, enhancing team skills and accelerating time-to-market to increase the company’s competitive advantage. Hardent helps its customers become leaders in their fields by understanding their needs and challenges and offering innovative solutions through result-oriented problem-solving consulting, engineering and training/coaching professional services.