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Embedded Systems Design

Embedded systems design training that will show you how to develop systems for Xilinx Zynq SoCs & Zynq UltraScale+ MPSoCs.

Learn general embedded concepts, tools, and techniques using the Vivado Design Suite and Vitis™ unified software platform.

The emphasis is on:
  • Designing, expanding, and modifying embedded systems utilizing the features and capabilities of the Zynq® System on a Chip (SoC), Zynq UltraScale+™ MPSoC, or MicroBlaze™ soft processor
  • Adding and simulating AXI-based peripherals using bus functional model (BFM) simulation.

Release date

July 2016

Level

Embedded Hardware 3

Training duration

2 days

Price

USD 1600 or 16 Training Credits

Course Part Number

EMBD-HW

Who Should Attend?

Engineers who are interested in developing embedded systems with the Xilinx Zynq SoC, Zynq UltraScale+ MPSoC, and/or MicroBlaze soft processor core

Prerequisites

  • FPGA design experience
  • Completion of the Designing FPGAs Using the Vivado Design Suite 1 course or equivalent knowledge of Xilinx Vivado® software implementation tools
  • Basic understanding of C programming
  • Basic understanding of microprocessors
  • Some HDL modeling experience

Software Tools

  • Vivado Design Suite 2021.2
  • Vitis unified software platform 2021.2

Hardware

  • Architectures: Zynq-7000 SoC (Cortex-A9 processor), Zynq UltraScale+ MPSoC (Cortex-A53 and Cortex-R5 processors), and MicroBlaze processor
  • Demo board: Zynq UltraScale+ ZCU104 board or Versal™ ACAP VCK190 (optional)

Skills gained

After completing this comprehensive training, you will have the necessary skills to:
  • Describe the various tools that encompass a Xilinx embedded design
  • Rapidly architect an embedded system containing a Cortex-A9/A53/R5 or MicroBlaze processor using the Vivado IP integrator and Customization Wizard
  • Develop software applications utilizing the Vitis unified software platform
  • Create and integrate an IP-based processing system component in the Vivado Design Suite
  • Design and add a custom AXI interface-based peripheral to the embedded processing system
  • Simulate a custom AXI interface-based peripheral using verification IP (VIP)

Course Outline

  • Embedded UltraFast Design Methodology – Outlines the different elements that comprise the Embedded Design Methodology. {Lecture, Demo}
  • Overview of Embedded Hardware Development – Overview of the embedded hardware development flow. {Lecture, Demo}
  • Driving the IP Integrator Tool – Describes how to access and effectively use the IPI tool. {Lecture, Lab}
  • Overview of Embedded Software Development – Reviews the process of building a user application.{Lecture}
  • Driving the Vitis Software Development Tool – Introduces the basic behaviors required to drive the Vitis tool to generate a debuggable C/C++ application. {Lecture, Lab}
  • AXI: Introduction – Introduces the AXI protocol. {Lecture}
  • AXI: Variations – Describes the differences and similarities among the three primary AXI variations. {Lecture}
  • AXI: Transactions – Describes different types of AXI transactions. {Lecture, Demo, Lab}
  • Introduction to Interrupts – Introduces the concept of interrupts, basic terminology, and generic implementation. {Lecture}
  • Interrupts: Hardware Architecture and Support - Reviews the hardware that is typically available to help implement and manage interrupts. {Lecture}
  • AXI: Connecting AXI IP – Describes the relationships between different types of AXI interfaces and how they can be connected to form hierarchies.{Lecture, Demo}
  • Creating a New AXI IP with the Wizard – Explains how to use the Create and Import Wizard to create and package an AXI IP. {Lecture, Lab}
  • AXI: BFM Simulation Using Verification IP – Describes how to perform BFM simulation using the Verification IP.(Lecture, Lab}
  • MicroBlaze Processor Architecture Overview – Overview of the MicroBlaze microprocessor architecture. {Lecture, Lab}
  • MicroBlaze Processor Block Memory Usage – Highlights how block RAM can be used with the MicroBlaze processor. {Lecture}
  • Zynq-7000 SoC Architecture Overview – Overview of the Zynq-7000 SoC architecture. {Lecture, Lab, Demo}
  • Zynq UltraScale+ MPSoC Architecture Overview – Overview of the Zynq UltraScale+ MPSoC architecture. {Lecture, Lab, Demo}

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From Xilinx training credits to government funding, there are several options available to help you cover training costs.

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