This pre-recorded webinar will give you an overview of advanced debugging techniques that can save you time when debugging your next design in the Vivado Design Suite.
Want to learn how to debug your designs quickly and more effectively?
This webinar will provide an overview of some of the hardware debug capabilities available to FPGA and board designers within the Vivado Design Suite
Over the course of the webinar, we will look at the following tools: Vivado Logic Analyzer (ChipScope Pro), IBERT, and Hardware Manager.
The webinar will also include brief demos that will show you how to: Use VLA to change hardware targeted debug signals - without the need to re-implement the complete design and use the Vivado serial I/O analyzer to verify a serial transceiver link.
This webinar will provide an overview of some of the hardware debug capabilities available to FPGA and board designers within the Vivado Design Suite
Over the course of the webinar, we will look at the following tools: Vivado Logic Analyzer (ChipScope Pro), IBERT, and Hardware Manager.
The webinar will also include brief demos that will show you how to: Use VLA to change hardware targeted debug signals - without the need to re-implement the complete design and use the Vivado serial I/O analyzer to verify a serial transceiver link.
Release date
May 29, 2020Level
Training duration
Price
FreeSkills gained
After completing this comprehensive training, you will have the necessary skills to:- Explain the capabilities of each of the tools above
- Understand how and when they can be used to reduce overall design development time