Webinar: How to Use the Versal ACAP Programmable Network on Chip (NoC) (REL)

You might be asking “what’s a NoC?” This webinar will introduce you to the Xilinx Versal programmable network on chip (NoC), a key design element in the Versal ACAP architecture.

Moore’s law requires a rethinking of how to move data through a large, heterogeneous device like the Versal ACAP.

There will also be a demonstration on how to implement the NoC in design using the Vivado IP Integrator tool.

Skills gained

After completing this comprehensive training, you will have the necessary skills to:

• Recognize why Versal ACAP requires the NoC
• Appreciate what the NoC provides 
• Understand how to direct the quality of services of the NoC in design