Compressed video images can be affected by transmission errors. Using the example of DisplayPort 1.4 and VESA Display Stream Compression (DSC), we’re taking a look at how Reed-Solomon Forward Error Correction (FEC) code is used to improve the resiliency to link errors when transporting compressed video.
DisplayPort 1.4, released by the Video Electronics Standards Association (VESA) in March 2016, added support for VESA Display Stream Compression (DSC) 1.2a and Reed-Solomon Forward Error Correction (FEC) code to support next-generation higher resolution displays.
The addition of video compression to the most recent versions of the main video transport standards offers a solution to support the increased resolution, refresh rates, and bit depths of emerging displays without adding lanes or increasing bit rates. However, data transported over a cable can be affected by transmission errors. The effect of bit errors on uncompressed video is relatively innocuous, but bit errors can have a catastrophic impact on the visual experience when they occur on a compressed video stream.
The DisplayPort 1.4 standard, combined with VESA DSC, will be used as an example in this article to illustrate the main concepts of FEC with video compression and explain how it is used to achieve a glitch-free visual experience.
The Evolution of Video
Over time, display resolutions, refresh rates, and color depths have increased significantly, as shown on the table below. All of these factors contribute to the amount of data that needs to be transported over a video link.
The DisplayPort 1.4 Standard
DisplayPort 1.4 can use 1, 2 or 4 self-clocked lanes running at up to 8.1 Gbps, providing a maximum usable data rate of 26 Gbps with 4 lanes. The DisplayPort physical layer uses 8b/10b encoding to guarantee sufficient data transitions for the clock recovery process and maintain the DC balance required for AC coupling.
At very high speed, cables become transmission lines. They have a given frequency response with increasing losses at higher frequencies, and can suffer from interference of neighbouring transmission lines and reflections from the near/far ends connectors due to impedance mismatches. Different techniques are used to compensate for the characteristics of the channel, including applying an amplification function inverse of the frequency drop-off of the channel at the receiver side. Unfortunately, this technique amplifies both the signal and the noise, resulting in some corruption of the data being transmitted. Characteristics of the receiver circuit, using Decision Feedback Equalization (DFE) to compensate for the varying frequency spectrum of the data carried over the channel, can also cause error multiplication; a single error affects the following received bits, causing an error burst (multiple consecutive errors) at the receiver side. There are also external causes of bursty errors, such as electromagnetic field interferences caused by a motor being turned on nearby or an electrostatic discharge.
The 1×10-9 (1 error every billion bits) is the maximum allowable bit error rate (BER) from all sources of a DisplayPort cable, while the maximum bit error burst length is estimated to be 30-bit. A BER of 1×10-9 is really the worst case. It will likely be significantly better, especially at the lower link rates. So what does this do to the video?
The Effect of the BER on Video
The BER is the probability that a given bit will be corrupted. If we were to assume a random distribution of 1×10-9 at full HD (1080p) rate, a single bit error may occur every 1/3 of a second. While some errors are random, burst errors are far more common than simple random noise errors. A full HD display has over 2 million pixels. If bursts are taken into consideration, errors may happen significantly less often, every 10 seconds assuming that all errors are occurring in 30-bit burst.
While a single bit error will corrupt only one 10-bit symbol affecting as a single pixel, a 30-bit burst error can affect up to 4 symbols, which in turn can affect up to 4 consecutive pixels. But in an uncompressed video environment 4 consecutive pixels remains a very small percentage out of 2 millions pixels (less than .0002%). And the error lasts 1/60th of a second. It is very unlikely to be noticeable by the viewer.
VESA Display Stream Compression (DSC) Increases The Data Transport Capacity of the DisplayPort Link
DisplayPort 1.4 cannot accommodate all the most recent usage models. For example, 8Kp60 requires 50Gbps and DP1.4 can only effectively delivers a throughput of 26Gbps. The solution to get this increased data bandwidth through a channel is to use video compression.
Developed by VESA, the Display Stream Compression (DSC) standard is a visually lossless compression algorithm that increases the data transport capacity of display links by up to 3X. The VESA DSC algorithm is designed to compress video in real-time for use in display transmission links with a Constant Bit Rate (CBR). The DSC algorithm is based on Delta Pulse Code Modulation (DPCM) and offers extremely low latency (only a few microseconds). The standard offers excellent picture quality for all types of content, including graphics, text, videos, and test patterns.
The images to be encoded by the DSC algorithms are broken down into multiple symmetrical rectangles of several thousand pixels in size called ‘slices’. To reduce the redundancy of the data to be transmitted, DSC uses various techniques like variable length coding (VLC), using predictors and differential coding, and performing quantization. Unfortunately even a single error occurring in the compressed data may affect multiple pixels when reconstructing the display data at the decoder. For example most of the modes use predictors, with most of them using the left pixel as a predictor. If one corrupted pixel is used as a predictor, then the next pixel will also be wrong. DSC will lose the ability to recover the image until it reaches a fixed recovery point, in this case the end of the slice. When this corruption occurs, it will last until the end of the current slice and will be quite noticeable by the viewer.
This results is that the 1×10-9 bit error rate, although harmless in uncompressed video, can be catastrophic in compressed video.
Reed-Solomon Forward Error Correction (FEC) Code For DisplayPort 1.4 Explained
When carrying compressed video, Forward Error Correction (FEC) is needed to improve the BER of the channel. FEC adds redundancy into the information being transmitted through additional bits in the bitstream. The receiver side uses the redundant information to determine which bits are corrupted, and how to correct them.
There are a large number of different error-correcting codes (ECCs); these include Reed-Solomon, BCH, Hamming, etc., used for a variety of different applications. Each ECC has different characteristics in terms of overhead, correction capability, and computational complexity.
DisplayPort 1.4 uses the Reed-Solomon RS(254,250) FEC code operating on the 10-bit 8b/10b encoded symbols. The encoder takes 250 data symbols and generates 4 10-bit parity symbols in a block. This code can correct up to 2 symbols per code block. To cover the 30-bit error burst possible on the DisplayPort link, interleaving of two FEC blocks is performed. Data sent on a channel is interleaved so that half of the symbols are part of one FEC block and the other half are part of another. This technique provides a better error burst tolerance without adding parity symbol overhead. In 2-lane and 4-lane mode, the data from two adjacent lanes are interleaved for the parity generation. In 1-lane mode, the two blocks are generated by the even and odd symbols within the datastream. This results in a FEC block with 500 data symbols and 8 parity symbols. The parity codes must be independently 8b/10b encoded and disparity corrected. 4 parity symbols become 6 codes including the code to adjust the disparity.
VESA DSC + Reed-Solomon Forward Error Correction (FEC) = A Glitch-free Visual Experience
When using Reed-Solomon encoding DisplayPort 1.4 provides usable video bandwidth of 25.3Gbps taking into account the FEC overhead. VESA DSC provides 3:1 compression, allowing for video streams of up to 75Gbps, which is enough for 8K video at 60Hz with 24 bits/pixel (50Gbps). On link with a BER of 1×10-9, FEC improves the corrected error rate to 1×10-18. At full DisplayPort bandwidth (32.4Gbps), this represents approximately one uncorrected error per year instead of several per second.
With the addition of VESA DSC, DisplayPort 1.4 supports the increased resolution, refresh rates, and bit depths of emerging displays while maintaining the same number of lanes and bit rate as DisplayPort 1.3. And the FEC function provides the viewer with a glitch free experience even in the worst BER conditions.
Want to find out more about using Reed-Solomon Forward Error Correction (FEC) code with DisplayPort 1.4? Check out our Reed-Solomon Forward Error Correction (FEC) IP products page!