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Xilinx & Verification Training Courses
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Verification Training Courses: SystemVerilog Training & UVM Training Taught by Verification Specialists

Hardent’s verification training courses cover a wide range of functional verification topics including SystemVerilog and UVM.

Functional verification has become a key component of the electronic design process. Our verification training courses are designed to help you effectively master the latest verification techniques for your next ASIC or FPGA design project. We offer courses in a variety of learning formats, giving you the flexibility to study in the way that suits you best.

Verification Training Courses

  • SystemVerilog for Verification
  • SystemVerilog for Verification (On-Demand)
  • SystemVerilog Assertions
  • Introduction to Universal Verification Methodology (UVM)
  • Introduction to UVM Universal Verification Methodology (On-Demand)
  • Advanced Universal Verification Methodology (UVM)

Partnership with Verification Specialists WHDL

Hardent’s verification courses are taught in collaboration with Willamette HDL (WHDL).
Hardent and WHDL have been verification training partners since 2013.

Verification Training Courses With Hardent & WHDL

Verification Training Schedule

Our verification training courses are available throughout the world. We offer public classroom training, as well as both live and on-demand online training.

We can also work with you to design and deliver a private training for your team on any of the verification topics covered in our curriculum.

Check out our training schedule to see what’s coming up soon in your region!

Have questions? Contact us to discuss your training options.

Contact HardentContact me
Mary-Ann Conly
Training Coordinator
Wondering Which Course to Take?

Download our learning path guide to find the right course level and topic for the next step in your career development.

New Versal ACAP Training Courses

Versal ACAP: Programmable Logic Architecture & Methodology

Versal ACAP: Embedded Processor Architecture & Methodology

Versal ACAP: Power & Board Design

Versal ACAP: Network on Chip

Designing with the Versal AI Engine 1 

Designing with the Versal AI Engine 2

Designing with the Versal AI Engine 3

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Accelerating Applications with Vitis

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Upcoming Sessions
Apr 20–22
Embedded System Design for the Zynq UltraScale+ MPSoC
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Apr 26–29
Introduction to UVM
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Apr 26–27
Embedded Design with PetaLinux Tools
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Apr 27–28
Designing with Xilinx Serial Transceivers
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Complete Course Schedule
Contact Hardent
Mary-Ann Conly
Training Coordinator
HardentMontreal
450 rue Saint-Pierre, suite 300
Montreal
,
QC
H2Y 2M9
Canada
T +1 (514) 284-5252
F +1 (514) 284-5052
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We made the decision to work with Hardent as we felt confident that their strategic approach to the development process, combined with their technical expertise and training credentials, would help us to successfully reach our end goal and equip our in-house team with the electronic design knowledge to complete not just this project but other projects in the future.

Stefan Grigoras
Operations Manager
NDT Technologies Inc.
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