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Verification Training Courses: SystemVerilog Training & UVM Training Taught by Verification Specialists

Hardent’s verification training courses cover a wide range of functional verification topics including SystemVerilog and UVM.

Functional verification has become a key component of the electronic design process. Our verification training courses are designed to help you effectively master the latest verification techniques for your next ASIC or FPGA design project. We offer courses in a variety of learning formats, giving you the flexibility to study in the way that suits you best.

Verification Training Courses

  • SystemVerilog for Verification
  • SystemVerilog for Verification (On-Demand)
  • SystemVerilog Assertions
  • Introduction to Universal Verification Methodology (UVM)
  • Introduction to UVM Universal Verification Methodology (On-Demand)
  • Advanced Universal Verification Methodology (UVM)

Partnership with Verification Specialists WHDL

Hardent’s verification courses are taught in collaboration with Willamette HDL (WHDL).
Hardent and WHDL have been verification training partners since 2013.

Verification Training Courses With Hardent & WHDL

Verification Training Schedule

Our verification training courses are available throughout the world. We offer public classroom training, as well as both live and on-demand online training.

We can also work with you to design and deliver a private training for your team on any of the verification topics covered in our curriculum.

Check out our training schedule to see what’s coming up soon in your region!

Have questions? Contact us to discuss your training options.

Contact HardentContact me
Mary-Ann Conly
Training Coordinator
Hardent Exclusive Training Courses

Our exclusive courses have been developed by our very own team of in-house Xilinx and FPGA specialists.

Programmable Logic Architecture for the Versal ACAP

Embedded Processor Architecture for the Versal ACAP

Embedded System Design for the Zynq UltraScale+ MPSoC

FPGA Design with Vivado Design Suite: The Essentials 1

FPGA Design with Vivado Design Suite: The Essentials 2

Vivado Design Suite Advanced XDC and Static Timing Analysis with Design Methodology

Advanced Timing Closure Techniques for the Vivado Design Suite

Advanced Hardware Debugging Techniques Using Vivado Design Suite

Migrating from Spartan-6

See all Courses
Wondering Which Course to Take?

Check out our full course list or download our learning path guide to find the right course level and topic for you!

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Contact Hardent
Mary-Ann Conly
Training Coordinator
HardentMontreal
450 rue Saint-Pierre, suite 300
Montreal
,
QC
H2Y 2M9
Canada
T +1 (514) 284-5252
F +1 (514) 284-5052
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I’ve worked with Hardent for many years and have recommended them a few times in the past. Hardent has always been extremely successful with their clients. They have many flexible ways of working with a client and will negotiate a mutually beneficial solution.

In our case, they just log into our servers and we are in constant contact via IM, email, phone, etc., but they have all their own design tools as well, so they can work either way. Being in the same time zone makes working with them easy. I am sure you will be happy with the outcome of their work. They’ll hit the ground running much faster than a single contractor would.

Marshall Johnson
Sr. Director Global ASIC/FPGA/IP Development
ADVA Optical Networking
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