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New Webinar Schedule: Constraint Management, SystemVerilog, and OpenAMP

April 10, 2017

Following our recent Introduction to Yocto webinar, Hardent is pleased to announce three more training webinars.

These free webinars will address many different aspects of FPGA and embedded system design including constraint management in the Vivado Design Suite, functional coverage in SystemVerilog, and the OpenAMP framework.

Find out more about our webinars below:

Best Practices for Constraints Management in the Vivado Design Suite – April 18, 2017

This webinar explores several mechanisms for entering constraints and discusses the pros and cons of each method.

In this webinar, attendees will:

  • Learn the four steps to creating clock constraints
  • Discover the importance of Baselining a design
  • Learn about the four different methods to enter design constraints
  • Discover shortcuts to create and add constraints directly from Xilinx reports and design analysis tools

This webinar is now over. Register here to watch a recorded version of the webinar.

An Introduction to Functional Coverage in SystemVerilog – May 24, 2017

This webinar will introduce the basics of functional coverage in SystemVerilog. We will discuss how to specify your coverage goals, how to use coverage metrics during simulation, and even how to stop simulation when your goals are reached.

In this webinar, attendees will:

  • Learn the basics of functional coverage in SystemVerilog
  • Recognize the importance of functional coverage
  • Discover how to define covergroups, coverpoints, and bins
  • Learn how to interrogate the functional coverage database “live” during simulation

This webinar is now over. Register here to watch a recorded version of the webinar.

The OpenAMP Framework for Heterogeneous Software Architecture – June 20, 2017

This webinar will look at what the OpenAMP framework is and outline how designers can leverage the framework to run different software platforms concurrently, such as Linux and an RTOS, on different processors within the same SoC whether homogeneous (multi-core), or heterogeneous (multi-processor), or a combination of both.

In this webinar, attendees will:

  • Learn about Linux Asymmetric Multiprocessing (AMP) on multi-core and heterogeneous devices
  • Discover what the OpenAMP framework is and how it can be utilized to manage firmware across a multi-processor system
  • Learn how to get started with the OpenAMP framework (topology, start-up process, API, and vendor support)

This webinar is now over. Register here to watch a recorded version of the webinar.

These webinars will be presented live by Hardent’s engineers and will include a Q&A session.

We look forward to welcoming you at one of our webinars soon!

Interested in learning more about constraint management, SystemVerilog, or OpenAMP?  Hardent offers a complete range of FPGA, functional verification, and embedded design training courses that cover these topics in greater detail. Click on the button below to see our complete course list.

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Check out Hardent's latest webinar schedule.
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I’ve worked with Hardent for many years and have recommended them a few times in the past. Hardent has always been extremely successful with their clients. They have many flexible ways of working with a client and will negotiate a mutually beneficial solution.

In our case, they just log into our servers and we are in constant contact via IM, email, phone, etc., but they have all their own design tools as well, so they can work either way. Being in the same time zone makes working with them easy. I am sure you will be happy with the outcome of their work. They’ll hit the ground running much faster than a single contractor would.

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Sr. Director Global ASIC/FPGA/IP Development
ADVA Optical Networking
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