HDMI 2.1: VESA DSC & FEC IP Cores

HDMI 2.1 provides up to 48 Gbit/s raw bandwidth, which can be used for displays supporting 8K and 10K operating at limited refresh rates or with reduced color information. In order to achieve even higher resolutions, faster refresh rates, and greater color depths, HDMI 2.1 incorporates support for VESA Display Stream Compression (DSC) 1.2a. With the higher link rates allowed in HDMI 2.1, DSC makes resolutions of over 8K with HDR 10-bit color possible, at refresh rates of both 60Hz and 120Hz.

DSC can also be used with the previous HDMI standard link rates of 3 and 6 Gbit/s. This means that HDMI cables supporting earlier versions of the HDMI standard can also achieve higher resolutions and frame rates through the use of compression, making display resolutions above 4K at 120Hz possible.

To achieve higher throughputs, HDMI 2.1 uses a new packet-based link layer. This layer converts the clock and three data lanes of original HDMI TMDS mode to three or four self-clocked links that can be operated at up to 12 Gbit/s. A versatile packet mode maps video, either uncompressed or compressed with DSC, audio, and data over the link. A Forward Error Correction (FEC) algorithm is used to correct possible transmission errors and ensure an error free transmission of the packets over the HDMI links.

Hardent’s HDMI FEC IP cores implement Reed-Solomon RS(255,251) FEC code and symbol de-interleaving/de-mapping as specified by the HDMI 2.1 standard.