Back to

Live Online Webinar | System Protection for Zynq UltraScale+ MPSoCs

System Protection Features of Zynq UltraScale+ MPSoCs

Presenter: Troy Jones
This webinar will highlight the different system protection features of Xilinx Zynq UltraScale+ MPSoCs, including ARM TrustZone technology, the XMPU, XPPU, and SMMU.

14:00 EST

~~Register Now~~

This webinar is now over, but you can register here to watch a recorded version of the webinar.

Rambus Completes Acquisition of Hardent

Strengthens CXL Memory Interconnect Initiative and accelerates roadmap of data center solutions

Rambus to Acquire Hardent, Accelerating Roadmap for Next-Generation Data Center Solutions

Augments world-class engineering team with deep SoC digital design expertise for Rambus CXL Memory Interconnect Initiative

Frame Buffer Compression IP Subsystem for TCON IC Manufacturers Launched by Hardent

Proven IP subsystem enables TCON IC manufacturers to leverage new Embedded DisplayPort low power features and significantly reduce frame buffer area using VESA DSC.

Alain Legault

Vice President IP Products

Linked-in

HardentMontreal

450 rue Saint-Pierre, suite 300

Montreal

H2Y 2M9

Canada

T +1 (514) 284-5252

F +1 (514) 284-5052

First Name

Last Name

Title

Company

Phone

City

Country

Subject

Tick to hear more from Hardent by email. This includes our newsletter, details about offers, new courses, and events. You can opt out at any time. For further information, please refer to our privacy policy.