Back to

Live Online Webinar | System Protection for Zynq UltraScale+ MPSoCs

System Protection Features of Zynq UltraScale+ MPSoCs

Presenter: Troy Jones
This webinar will highlight the different system protection features of Xilinx Zynq UltraScale+ MPSoCs, including ARM TrustZone technology, the XMPU, XPPU, and SMMU.

14:00 EST

~~Register Now~~

This webinar is now over, but you can register here to watch a recorded version of the webinar.

Hardent and PLC2 Announce New IP Partnership to Support German Semiconductor Companies

PLC2 named as the official IP representative for Hardent’s video compression IP cores in Germany, Austria, and Switzerland.

Hardent Becomes Authorized Microchip Design Partner

FPGA design services and support from Hardent will enable Microchip customers to get their products to market more quickly.

Hardent Joins Forces with Maojet & Fujisoft To Expand Presence in Asia

We recently appointed Maojet Technology Corporation as our new IP representative for Taiwan, and Fujisoft as our new IP representative for Japan. We will be working closely with both companies to develop our IP business within these two key markets.

Upcoming Sessions

Sep 29–Oct 01

Vivado Design Suite Advanced XDC and Static Timing Analysis with Design Methodology

Oct 05–08

SystemVerilog for Verification

Oct 06–08

Advanced Timing Closure Techniques for the Vivado Design Suite

Oct 06–07

C-based Design - High-Level Synthesis with the Vivado HLx Tool

Complete Course Schedule

Simon Robin

President

Linked-in

HardentMontreal

450 rue Saint-Pierre, suite 300

Montreal

H2Y 2M9

Canada

T +1 (514) 284-5252

F +1 (514) 284-5052

First Name

Last Name

Title

Company

Phone

City

Country

Subject

Tick to hear more from Hardent by email. This includes our newsletter, details about offers, new courses, and events. You can opt out at any time. For further information, please refer to our privacy policy.