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Hardent now part of Rambus
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    • VESA DSC IP Cores
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News from Hardent

Blog

Read our latest news and updates below!

May 24, 2022

Rambus Completes Acquisition of Hardent

Strengthens CXL Memory Interconnect Initiative and accelerates roadmap of data center solutions …
More
May 5, 2022

Rambus to Acquire Hardent, Accelerating Roadmap for Next-Generation Data Center Solutions

Augments world-class engineering team with deep SoC digital design expertise for Rambus CXL Memory Interconnect Initiative …
More
January 26, 2022

Frame Buffer Compression IP Subsystem for TCON IC Manufacturers Launched by Hardent

Proven IP subsystem enables TCON IC manufacturers to leverage new Embedded DisplayPort low power features and significantly reduce frame buffer area using VESA DSC. …
More
December 16, 2021

Hardent VESA® DSC IP Cores Licensed by Teledyne LeCroy for DisplayPort™ Test Solution

Teledyne LeCroy selects Hardent DSC video compression IP cores for the quantum M42d DisplayPort 2.0 analyzer/generator. …
More

2021

June 9, 2021

Hardent VESA DSC and FEC IP Cores Licensed by Kinetic Technologies

April 21, 2021

Hardent Selected as Design Services Provider for New Xilinx Kria SOMs

March 10, 2021

Mixel, Rambus and Hardent Collaborate to Deliver State-of-the-Art Integrated MIPI Display Subsystem Solution

January 20, 2021

Hardent Announces Availability of New Xilinx Versal ACAP Training Courses

2020

December 2, 2020

Hardent Announces Expansion of Xilinx Training in the USA

June 29, 2020

Hardent and PLC2 Announce New IP Partnership to Support German Semiconductor Companies

April 30, 2020

Hardent Becomes Authorized Microchip Design Partner

March 31, 2020

Hardent Joins Forces with Maojet & Fujisoft To Expand Presence in Asia

February 12, 2020

New Mathematically Lossless Video Compression IP Cores Announced

2019

January 31, 2019

Hardent & Xilinx Collaborate to Deliver Complete 8K Ready DisplayPort 1.4 IP Subsystem

2018

November 27, 2018

Hardent & WHDL Named PSS Training Provider For Breker Trek5 Tool Suite

November 27, 2018

Hardent and Willamette HDL Develop New Portable Test and Stimulus Standard Training Course

May 16, 2018

New VDC-M (VESA Display Compression-M) IP Cores

January 3, 2018

Hardent IP Portfolio Supports New Features of HDMI 2.1 Specification

2017

November 1, 2017

Hardent Delivers Interoperable VESA DSC IP Solution for the New Arm Mali-D71 Processor

October 24, 2017

New ASIL-B Ready ISO 26262 Certified VESA DSC IP Cores Launched by Hardent

June 12, 2017

Hardent Receives Outstanding Instructor Award for Xilinx Training

2016

December 12, 2016

Hardent to Demo Visually Lossless 4K Display Stream Compression at CES 2017

October 5, 2016

Hardent to Train ARM TechCon Attendees How to Simplify Software Design on Complex SoCs

September 8, 2016

Hardent to Showcase VESA DSC Demonstration on 4K Display at MIPI DevCon

July 28, 2016

Hardent Launches New DisplayPort 1.4 Forward Error Correction IP Cores

April 28, 2016

Hardent to Present About VESA DSC at Cadence CDNLive Event in Germany

March 14, 2016

Hardent to Offer New SDSoC Support Services and Xilinx SDSoC Training

January 27, 2016

New VESA DSC v1.2 IP Products Announced by Hardent

2015

December 10, 2015

Hardent to Demo VESA Display Stream Compression IPs at CES 2016

November 4, 2015

Hardent Invited to Deliver Training at ARM TechCon Training Day

October 28, 2015

Hardent Joins the MIPI Alliance as a Contributor Member

September 30, 2015

Hardent Expands Global Reach with a New International Reseller Network

August 24, 2015

Silicon Works Adopts Hardent’s VESA DSC Decoder IP

July 16, 2015

Hardent First to Publicly Offer New ARM Cortex-M7 Training in North America

March 12, 2015

Synopsys and Hardent Provide Interoperable Display IP Solutions to Reduce Data Transmission Bandwidth for Ultra High-Definition Mobile Devices

2014

December 12, 2014

Hardent to Showcase the Industry’s First VESA DSC Encoder/Decoder IPs at CES 2015

September 11, 2014

Customized FPGA Design Training Plans Offered by Hardent at X-fest

August 5, 2014

First VESA DSC Video Compression Training Announced by Hardent

June 10, 2014

New Xilinx Online Embedded Software Design Training Using ZYBO Zynq Board Introduced by Hardent

April 7, 2014

First VESA Display Stream Compression (DSC) Decoder IP Announced by Hardent

February 24, 2014

Hardent Becomes an ARM Approved Training Center

2013

December 17, 2013

Hardent to Offer Xilinx’s ISE to Vivado Design Suite Accelerated Migration Program

September 30, 2013

Hardent Joins the Video Electronics Standards Association (VESA)

August 14, 2013

Hardent Reports Increased Demand for Xilinx FPGA Support Service

June 10, 2013

Hardent to Deliver Advanced FPGA Verification Automation Seminars

May 16, 2013

Hardent Widens Training Scope by Offering SystemVerilog, OVM, UVM and Functional Hardware Verification Training Through Partnership with Williamette HDL

April 10, 2013

Space Codesign and Hardent Announce the Availability of New Training on Hardware / Software Codesign and Electronic System Level Methodologies for Xilinx Zynq Developers

February 28, 2013

Hardent Reports Strong Growth in Electronics Management Consulting Services

2012

November 29, 2012

Hardent to Announce Availability of Online Xilinx Electronics Training Courses

September 19, 2012

Hardent Joins ICT Canada Booth at Futurecom Brazil 2012

Latest News
Contact Us
Rambus Completes Acquisition of Hardent
Strengthens CXL Memory Interconnect Initiative and accelerates roadmap of data center solutions
More
Rambus to Acquire Hardent, Accelerating Roadmap for Next-Generation Data Center Solutions
Augments world-class engineering team with deep SoC digital design expertise for Rambus CXL Memory Interconnect Initiative
More
Frame Buffer Compression IP Subsystem for TCON IC Manufacturers Launched by Hardent
Proven IP subsystem enables TCON IC manufacturers to leverage new Embedded DisplayPort low power features and significantly reduce frame buffer area using VESA DSC.
More
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Alain Legault
Vice President IP Products
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Prodco International Inc.
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