News from Hardent
Kinetic Technologies selects Hardent's IP cores to create ultra-low power MST hub with VESA DSC support.
…
MoreHardent will support AI developers, embedded developers, and system architects to develop applications using the latest Xilinx device family.
MoreMarch 10, 2021
Mixel, Rambus and Hardent Collaborate to Deliver State-of-the-Art Integrated MIPI Display Subsystem Solution
Mixel, Rambus and Hardent collaborate to offer a complete display IP subsystem solution.
…
MoreNew Xilinx Versal ACAP training courses will cover all aspects of designing with the latest Xilinx device category.
…
More2020
December 2, 2020
Hardent Announces Expansion of Xilinx Training in the USA
April 30, 2020
Hardent Becomes Authorized Microchip Design Partner
February 12, 2020
New Mathematically Lossless Video Compression IP Cores Announced
2019
2018
November 27, 2018
Hardent & WHDL Named PSS Training Provider For Breker Trek5 Tool Suite
May 16, 2018
New VDC-M (VESA Display Compression-M) IP Cores
2017
2016
September 8, 2016
Hardent to Showcase VESA DSC Demonstration on 4K Display at MIPI DevCon
January 27, 2016
New VESA DSC v1.2 IP Products Announced by Hardent
2015
December 10, 2015
Hardent to Demo VESA Display Stream Compression IPs at CES 2016
November 4, 2015
Hardent Invited to Deliver Training at ARM TechCon Training Day
October 28, 2015
Hardent Joins the MIPI Alliance as a Contributor Member
September 30, 2015
Hardent Expands Global Reach with a New International Reseller Network
August 24, 2015
Silicon Works Adopts Hardent’s VESA DSC Decoder IP
2014
September 11, 2014
Customized FPGA Design Training Plans Offered by Hardent at X-fest
February 24, 2014
Hardent Becomes an ARM Approved Training Center
2013
September 30, 2013
Hardent Joins the Video Electronics Standards Association (VESA)
August 14, 2013
Hardent Reports Increased Demand for Xilinx FPGA Support Service
2012
September 19, 2012