|On-Demand||Essential Tcl Scripting for the Vivado Design Suite (REL)||Recorded E-Learning||Register||Share||View Course Details|
|On-Demand||Essentials of 7 Series FPGAs (REL)||Recorded E-Learning||Register||Share||View Course Details|
|May 05–06, 2015||Designing with SystemVerilog||Live E-Learning||Register||Share||View Course Details|
|May 07, 2015||Debugging Techniques Using the Vivado Logic Anlayzer||Canada East||Waiting List||Share||View Course Details|
|May 07–08, 2015||Verification with SystemVerilog||Live E-Learning||Register||Share||View Course Details|
|May 11, 2015||Vivado Design Suite Tool Flow||Live E-Learning||Register||Share||View Course Details|
|May 11–13, 2015||DSP Primer||Live E-Learning||Register||Share||View Course Details|
|May 14–15, 2015||Essential DSP Implementation Techniques||Live E-Learning||Register||Share||View Course Details|
|May 20, 2015||Essential Tcl Scripting for the Vivado Design Suite||Live E-Learning||Register||Share||View Course Details|
|May 20–22, 2015||Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Design Suite Users||Ottawa, ON||Register||Share||View Course Details|
|May 21, 2015||Essential Tcl Scripting for the Vivado Design Suite||Montreal, QC||Register||Share||View Course Details|
|May 21–22, 2015||Essentials of FPGA Design (Vivado)||Live E-Learning||Register||Share||View Course Details|
|May 25–26, 2015||Designing with the UltraScale Architecture||Burlington, MA||Register||Share||View Course Details|
|May 26–27, 2015||Essentials of FPGA Design (Vivado)||Cocoa Beach, FL||Register||Share||View Course Details|
|May 27–29, 2015||Designing with Multi-Gigabit Serial I/O||Burlington, MA||Register||Share||View Course Details|
|May 28–29, 2015||Embedded Systems Design||Cocoa Beach, FL||Register||Share||View Course Details|
|Jun 01–02, 2015||DSP Design Using System Generator||Burlington, MA||Register||Share||View Course Details|
|Jun 02–03, 2015||OVM Testbench User Class||Ottawa, ON||Waiting List||Share||View Course Details|
|Jun 02–04, 2015||Signal Integrity and Board Design for Xilinx FPGAs||Live E-Learning||Register||Share||View Course Details|
|Jun 03–04, 2015||Zynq All Programmable SoC System Architecture||Burlington, MA||Register||Share||View Course Details|
Your first contact at Hardent for more information about our services
Your first contact at Hardent for more information about our services:
Hardent offers technical training courses delivered in person and online. All of our trainers are experienced electronic design and software engineers with extensive hands-on experience in their training fields. As a Xilinx ATP and ARM ATC, we offer a wide range of training programs covering FPGA design, embedded systems design, functional verification, and much more.
Find out more about our electronic design training courses by clicking below.
At Hardent, in addition to our public electronic design courses and Xilinx training schedule, our customers can benefit from personalized training courses and a complete training package tailored to their individual needs.
Personalized training options with Hardent include custom electronic design courses designed and developed for your team, follow-on coaching sessions, electronic design and consulting services, and the opportunity to benefit from the Xilinx Productivity Advantage Program.
Find out more about our custom electronic design training options by clicking below.
We made the decision to work with Hardent as we felt confident that their strategic approach to the development process, combined with their technical expertise and training credentials, would help us to successfully reach our end goal and equip our in-house team with the electronic design knowledge to complete not just this project but other projects in the future.