Electronic Design: Xilinx & Verification Training Courses

Xilinx & Functional Verification Training

Learn from industry experts with real-world engineering experience

Course Schedule

DATE	COURSE	LOCATION	STATUS	SHARE
Dec 11, 2018	Developing AWS F1 Applications Using the SDAccel Environment	Ottawa, ON	Register Confirmed	Share
Dec 13–14, 2018	Embedded Design with PetaLinux Tools	Live E-Learning	Register Confirmed	Share
Dec 17–18, 2018	Advanced Features and Techniques of Embedded Systems Design	Live E-Learning	Register Confirmed	Share
Dec 19, 2018	SDSoC Development and Methodology (SDSoC license Included)	Montreal, QC	Register	Share
Dec 20, 2018	Developing AWS F1 Applications Using the SDAccel Environment	Montreal, QC	Register	Share
Dec 20–21, 2018	Advanced SDSoC Development Environment and Methodology (SDSoC license included)	Montreal, QC	Register	Share
Jan 08–10, 2019	Designing with VHDL	Live E-Learning	Register	Share
Jan 14–15, 2019	Accelerating C, C++, OpenCL, and RTL Applications with the SDAccel Environment	Montreal, QC	Register	Share
Jan 14–16, 2019	Vivado Design Suite Advanced XDC and Static Timing Analysis with Design Methodology	Live E-Learning	Register Confirmed	Share
Jan 14–17, 2019	SystemVerilog for Verification	Coquitlam, BC	Register	Share

Showing results 1 to 10 of 110

Vivado Design Analysis for Performance

Useful commands for design analysis in the Vivado Design Suite that will help you save time and meet your performance goals! More and more FPGA designs these days have requirements that demand a wide and fast data processing pipeline. This is especially true with video pipelines processing streams of 8K at 120Hz or telecommunication applications […]

Hardent & Willamette HDL Named by Breker Verification Systems As Portable Test & Stimulus Standard (PSS) Training Provider For Trek5 Tool Suite

New PSS training course from Hardent and WHDL will cover unique Breker Trek5 UVM/SoC deployment and modeling capabilities.

Hardent and Willamette HDL Develop New Portable Test and Stimulus Standard Training Course

New PSS training course equips engineers using Cadence Perspec with the skills needed to accelerate SoC verification.

Upcoming Sessions

Dec 11

Developing AWS F1 Applications Using the SDAccel Environment

Dec 13–14

Embedded Design with PetaLinux Tools

Dec 17–18

Advanced Features and Techniques of Embedded Systems Design

Dec 19

SDSoC Development and Methodology (SDSoC license Included)

Complete Course Schedule

Contact Hardent

Mary-Ann Conly

Training Coordinator

HardentMontreal

450 rue Saint-Pierre, suite 300

Montreal

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QC

H2Y 2M9

Canada

T +1 (514) 284-5252

F +1 (514) 284-5052

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