| DATE | COURSE | LOCATION | STATUS | SHARE |
| Jul 08–09, 2019 | C-based Design - High-Level Synthesis with the Vivado HLx Tool | Burlington, MA | Register | |
| Jul 08–09, 2019 | C-based Design - High-Level Synthesis with the Vivado HLx Tool | Live E-Learning | Register | |
| Jul 08–09, 2019 | Designing FPGAs Using the Vivado Design Suite 1 | Live E-Learning | Register | |
| Jul 08–11, 2019 | SystemVerilog for Verification | Orlando, FL | Register | |
| Jul 08–11, 2019 | Introduction to Universal Verification Methodology (UVM) | Live E-Learning | Register | |
| Jul 09–11, 2019 | Verilog for Design | Live E-Learning | Register | |
| Jul 10–11, 2019 | Designing FPGAs Using the Vivado Design Suite 2 | Live E-Learning | Register | |
| Jul 15–16, 2019 | C-based Design - High-Level Synthesis with the Vivado HLx Tool | Orlando, FL | Register | |
| Jul 15–18, 2019 | Introduction to Universal Verification Methodology (UVM) | Coquitlam, BC | Register | |
| Jul 15–18, 2019 | SystemVerilog for Verification | Live E-Learning | Register |
Course Schedule