| DATE | COURSE | LOCATION | STATUS | SHARE |
| Oct 28–30, 2019 | Embedded System Design for the Zynq UltraScale+ MPSoC | North Reading, MA |
Register Confirmed
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| Oct 29–30, 2019 | Embedded Design with PetaLinux Tools | Montreal, QC | Register | |
| Oct 31, 2019 | FPGA Power User Breakfast | North Reading, MA | Register | |
| Nov 04–07, 2019 | Introduction to Universal Verification Methodology (UVM) | Montreal, QC | Register | |
| Nov 05–07, 2019 | Vivado Design Suite Advanced XDC and Static Timing Analysis with Design Methodology | Live E-Learning | Register | |
| Nov 06–07, 2019 | Designing with the Zynq UltraScale+ RFSoC | Huntsville, AL |
Register Confirmed
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| Nov 07, 2019 | SystemVerilog Assertions | Live E-Learning | Register | |
| Nov 07–08, 2019 | Designing with the Zynq UltraScale+ RFSoC | Burlington, MA | Register | |
| Nov 12–14, 2019 | Embedded System Design for the Zynq UltraScale+ MPSoC | Coquitlam, BC | Register | |
| Nov 12–14, 2019 | Vivado Design Suite Advanced XDC and Static Timing Analysis with Design Methodology | Toronto, ON | Register |
Course Schedule