Electronic Design: Xilinx & Verification Training Courses

DATE	COURSE	LOCATION	STATUS	SHARE
Mar 15–18, 2021	Introduction to UVM	Live E-Learning	Register Confirmed	Share
Mar 16–18, 2021	Embedded System Design for the Zynq UltraScale+ MPSoC	Live E-Learning	Register Confirmed	Share
Mar 17–18, 2021	Xilinx Partial Reconfiguration Tools and Techniques	Live E-Learning	Register	Share
Mar 22–23, 2021	High-Level Synthesis with the Vitis HLS Tool	Live E-Learning	Register	Share
Mar 22–23, 2021	FPGA Design with Vivado Design Suite: The Essentials	Live E-Learning	Register Confirmed	Share
Mar 22–23, 2021	Designing with the Versal ACAP: Programmable Logic Architecture and Methodology	Live E-Learning	Register Confirmed	Share
Mar 23–25, 2021	Vivado Design Suite Advanced XDC and Static Timing Analysis with Design Methodology	Live E-Learning	Register	Share
Mar 23–25, 2021	Designing with the Zynq UltraScale+ RFSoC	Live E-Learning	Register	Share
Mar 24–25, 2021	Designing with Versal AI Engine 1	Live E-Learning	Register	Share
Mar 29–30, 2021	Designing with the Versal ACAP: Embedded Processor Architecture and Methodology	Live E-Learning	Register	Share

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