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Xilinx & Verification Training Courses
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Course List
Course Schedule

Course List

Whether you’re just starting out in your career, or you want to develop specialized skills, our course list has everything you need.

Wondering which course to take? Download our learning path to find the right course level and topic for the next step in your career development.

Versal ACAP
  • Designing with the Versal ACAP: Architecture and Methodology
  • Designing with the Versal ACAP: Programmable Logic Architecture and MethodologyHardent Exclusive
  • Designing with the Versal ACAP: Embedded Processor Architecture and MethodologyHardent Exclusive
  • Designing with the Versal ACAP: Power and Board DesignNew
  • Designing with the Versal ACAP: Network on ChipNew
  • Designing with Versal AI Engine 1: Architecture and Design Flow
  • Designing with Versal AI Engine 2: Graph Programming with AI Engine Kernels
  • Designing with Versal AI Engine 3: Kernel Programming and OptimizationNew
See more
Vitis Unified Software Platform
  • High-Level Synthesis with the Vitis HLS ToolNew
  • Accelerating Applications with the Vitis Unified Software Environment
  • Developing AI Inference Solutions with the Vitis AI Platform
  • Migrating to the Vitis Embedded Software Development IDE Workshop
See more
VIVADO DESIGN SUITE / FPGA DESIGN
  • FPGA Design with Vivado Design Suite: The EssentialsHardent Exclusive
  • Designing with the UltraScale and UltraScale+ Architectures
  • Improve Your Vivado Design Suite ProductivityHardent Exclusive
  • Vivado Design Suite Advanced XDC and Static Timing Analysis with Design MethodologyHardent Exclusive
  • Advanced Hardware Debugging Techniques Using Vivado Design SuiteHardent Exclusive
  • Xilinx Partial Reconfiguration Tools and Techniques
  • Advanced Timing Closure Techniques for the Vivado Design SuiteHardent Exclusive
See more
DSP DESIGN
  • High-Level Synthesis with the Vitis HLS ToolNew
  • DSP Primer
  • DSP Design Using System Generator
See more
CONNECTIVITY DESIGN
  • Designing with the Zynq UltraScale+ RFSoC
  • Designing with Xilinx Serial Transceivers
  • Introduction to Signal Integrity for Xilinx FPGAs
  • Designing with Ethernet MAC Controllers
See more
EMBEDDED SYSTEM DESIGN - ACCELERATION
  • Accelerating Applications with the Vitis Unified Software Environment
See more
EMBEDDED SYSTEM DESIGN - LINUX DEVELOPMENT
  • Embedded Design with PetaLinux Tools
See more
EMBEDDED SYSTEM DESIGN - ZYNQ-7000 SOC AND ZYNQ US+ MPSOC
  • Embedded System Design for the Zynq UltraScale+ MPSoCHardent Exclusive
  • Embedded Systems Design
  • Embedded Systems Software Design
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FUNCTIONAL VERIFICATION
  • SystemVerilog for VerificationHot Topic
  • SystemVerilog Assertions
  • Introduction to UVMHot Topic
  • Advanced UVM
  • SystemVerilog for Verification (On-Demand)Start Now!
  • SystemVerilog Assertions (On-Demand)Start Now!
  • Introduction to UVM (On-Demand)Start Now!
See more
HDL DESIGN
  • Designing with VHDLHot Topic
  • SystemVerilog for Design
  • Verilog for Design
  • Verilog Fundamentals for SystemVerilog
See more
PROGRAMMING LANGUAGES
  • Introduction to Perl
  • Introduction to TCL-tk
  • Essential Tcl Scripting for the Vivado Design Suite
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System Level Modeling and Verification
  • Introduction to C++ for Modeling
  • SystemC Introduction for Modeling with TLM 2.0
  • TLM 2.0
See more
WEBINARS
  • Webinar: Algorithm Acceleration Using Xilinx Platforms (REL)New
  • Webinar: Debugging Tips for the Vivado Design Suite (REL)
  • Webinar: Get Ready to Use the Xilinx Vitis Platform (REL)
  • Webinar: Error Injection Strategies for UVM-Based Verification (REL)
  • Webinar: An Introduction to the UVM Register Layer (REL)
See more
Contact HardentContact me
Mary-Ann Conly
Training Coordinator
Wondering Which Course to Take?

Download our learning path guide to find the right course level and topic for the next step in your career development.

Upcoming Sessions
Apr 20–22
Embedded System Design for the Zynq UltraScale+ MPSoC
Register
Apr 26–29
Introduction to UVM
Register
Apr 26–27
Embedded Design with PetaLinux Tools
Register
Apr 27–28
Designing with Xilinx Serial Transceivers
Register
Complete Course Schedule
Latest News
Contact Us
Mixel, Rambus and Hardent Collaborate to Deliver State-of-the-Art Integrated MIPI Display Subsystem Solution
Mixel, Rambus and Hardent collaborate to offer a complete display IP subsystem solution.
More
Hardent Announces Availability of New Xilinx Versal ACAP Training Courses
New Xilinx Versal ACAP training courses will cover all aspects of designing with the latest Xilinx device category.
More
Hardent Announces Expansion of Xilinx Training in the USA
Hardent selected by Xilinx to be the new Xilinx training provider in four U.S. states.
More
Upcoming Sessions
Apr 20–22
Embedded System Design for the Zynq UltraScale+ MPSoC
Register
Apr 26–29
Introduction to UVM
Register
Apr 26–27
Embedded Design with PetaLinux Tools
Register
Apr 27–28
Designing with Xilinx Serial Transceivers
Register
Complete Course Schedule
Contact Hardent
Mary-Ann Conly
Training Coordinator
HardentMontreal
450 rue Saint-Pierre, suite 300
Montreal
,
QC
H2Y 2M9
Canada
T +1 (514) 284-5252
F +1 (514) 284-5052
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R&D/ I.T Manager
Prodco International Inc.
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