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Embedded System Design for the Zynq UltraScale+ MPSoC

This 3-day Zynq UltraScale+ MPSoC course combines hardware, software, and architecture principles for designing with this Xilinx device.

This three-day course focuses on the Zynq UltraScale+ MPSoC family and the development methods needed to start designing your custom embedded system. It includes an overview of the features and capabilities of the device, encompassing implementation options, virtualization, various Linux implementations, booting and configuring a system, safety and security, and power management. Details of the Processor System (PS) and Programmable Logic (PL) are also covered in detail, including best-practices for interfacing the two with one another. All aspects of defining your embedded system architecture, starting with the hardware configuration and then running through the software implementation, will be covered.

Release date

July 2017

Level

Embedded Software 3

Training duration

3 days

Price

USD 2400 or 24 Training Credits

Course Part Number

HDT-ZUPSAW

Who Should Attend?

Hardware designers, software developers, and system architects interested in understanding the capabilities and ecosystem of the Zynq UltraScale+ MPSoC device.

Prerequisites

  • Suggested: Understanding of the Zynq-7000 architecture
  • Basic familiarity with embedded software development using C/C++
  • General understanding of embedded and real-time operating systems
  • Familiarity with issues related to implementing a complex embedded system

Software Tools

  • Vivado® Design Suite 2021.2
  • Vitis™ unified software platform 2021.2
  • Hardware emulation environment:
  • VirtualBox
  • QEMU
  • Ubuntu desktop
  • PetaLinux

Hardware

  • Host computer for running the above software

Skills gained

After completing this comprehensive training, you will have the necessary skills to:
  • Outline the high-level architecture of the Zynq UltraScale+ MPSoC device
  • Define the underlying implementation of the application processing unit (APU) and real-time processing unit (RPU) to make best use of their capabilities
  • Effectively use power management strategies and leverage the capabilities of the platform management unit (PMU)
  • Utilize QEMU to emulate hardware and software behavior
  • Define the boot sequences appropriate to the needs of the system
  • List the various power domains and how they are controlled
  • Describe the connectivity between the processing system (PS) and programmable logic (PL)
  • Distinguish between asymmetric multi-processing (AMP) and symmetric multi-processing (SMP) environments
  • Identify several Linux options for the MPSoC
  • Identify mechanisms to secure and safely run the system
  • Identify situations when the ARM® TrustZone technology and/or a hypervisor should be used

Course Outline

  • Day 1
    • Zynq UltraScale+ MPSoC Architecture Overview - Overview of the Zynq UltraScale+ MPSoC device. {Lectures, Lab}
    • Application Processing Unit - Introduction to the components of the APU, specifically the Cortex™-A53 processor and how the cluster is configured and managed. {Lectures}
    • Real-Time Processing Unit - Introduction to the various elements within the RPU and different modes of configuration. {Lectures}
    • The Quick Emulator (QEMU) - Introduction to the Quick Emulator, the tool used to emulate software for the Zynq UltraScale+ MPSoC device when hardware is not available. {Lectures, Lab}
    • System Coherency - Detailed discussions concerning shared memory and the AXI masters involved. {Lectures}
    • Power Management - Explore the granular power management features of MPSoC devices. {Lectures}
    • Platform Management Unit - Learn how the dedicated PMU can be used to control system-level power and how it can be extended for user custom processes. {Lectures, Lab}
  • Day 2
    • DDR Controller - Learn how DDR can be configured to provide the best performance for your system. {{Lectures}
    • Clocks and Resets - Overview of clocking and reset, focusing more on capabilities than specific implementations. {Lectures}
    • DMA - Overview of Zynq UltraScale+ MPSoC DMA Controllers. {Lectures}
    • AXI Interfaces and Variations - Discover how the PS and PL connect enables designers to create more efficient systems. {Lectures, Lab}
    • Creating Custom AXI Peripherals and Drivers - Learn how to use the Vivado Create and Package Wizard to create custom AXI IP then simulate it. Use the same wizard to help generate device drivers. {Lectures, Labs}
    • Boot and Configuration and the FSBL - Explores the Power-on-reset boot requirements and options. {Lectures, Lab}
  • Day 3
    • Safety Capabilities and Concepts - Basic exposure to the elements designed into the MPSoC for safetycritical designs. {Lectures}
    • Security Capabilities and Concepts - Explores the processing elements used to ensure a secure device.Includes both hardware and software components. {Lectures}
    • System Isolation Capabilities and Concepts - Covers all the hardware and software elements that support theseparation of software domains. {Lectures}
    • ARM TrustZone - Illustrates the use of the Arm® TrustZone technology. {Lectures}
    • Ecosystem Support - Overview of supported operating systems, software stacks, hypervisors, etc. {Lectures}
    • Software Stack - Learn what a software stack is and the many stacks used with the Zynq UltraScale+ MPSoC FreeRTOS {Lectures}
    • FreeRTOS - Overview of FreeRTOS, with examples of how it can be used. {Lectures, Lab}
    • Linux Basics and Symmetric Multi-Processing Linux - A basic look at what a Linux distribution is made up of and how it leverages the multiple processors of the MPSoC. {Lectures}
    • PetaLinux - Become familiar with the Xilinx productivity tool used to build a custom Linux distribution. {Lectures, Lab}
    • Yocto Fundamentals - Compares the kernel building methods between a "pure" Yocto build and the PetaLinux build tool. {Lectures, Lab}
    • OpenAMP - Introduction to the Asymmetric Multi-Processing capabilities of the MPSoC. {Lectures}

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